gic_v3_its.hh revision 14187:c2d86bac37ec
1/* 2 * Copyright (c) 2019 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions are 16 * met: redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer; 18 * redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution; 21 * neither the name of the copyright holders nor the names of its 22 * contributors may be used to endorse or promote products derived from 23 * this software without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 36 * 37 * Authors: Giacomo Travaglini 38 */ 39 40#ifndef __DEV_ARM_GICV3_ITS_H__ 41#define __DEV_ARM_GICV3_ITS_H__ 42 43#include <queue> 44 45#include "base/coroutine.hh" 46#include "dev/dma_device.hh" 47#include "params/Gicv3Its.hh" 48 49class Gicv3; 50class Gicv3Redistributor; 51class ItsProcess; 52class ItsTranslation; 53class ItsCommand; 54 55enum class ItsActionType 56{ 57 INITIAL_NOP, 58 SEND_REQ, 59 TERMINATE, 60}; 61 62struct ItsAction 63{ 64 ItsActionType type; 65 PacketPtr pkt; 66 Tick delay; 67}; 68 69/** 70 * GICv3 ITS module. This class is just modelling a pio device with its 71 * memory mapped registers. Most of the ITS functionalities are 72 * implemented as processes (ItsProcess) objects, like ItsTranslation or 73 * ItsCommand. 74 * Main job of Gicv3Its is to spawn those processes upon receival of packets. 75 */ 76class Gicv3Its : public BasicPioDevice 77{ 78 friend class ::ItsProcess; 79 friend class ::ItsTranslation; 80 friend class ::ItsCommand; 81 public: 82 class DataPort : public MasterPort 83 { 84 protected: 85 Gicv3Its &its; 86 87 public: 88 DataPort(const std::string &_name, Gicv3Its &_its) : 89 MasterPort(_name, &_its), 90 its(_its) 91 {} 92 93 virtual ~DataPort() {} 94 95 bool recvTimingResp(PacketPtr pkt) { return its.recvTimingResp(pkt); } 96 void recvReqRetry() { return its.recvReqRetry(); } 97 }; 98 99 DataPort dmaPort; 100 101 Port & getPort(const std::string &if_name, PortID idx) override; 102 bool recvTimingResp(PacketPtr pkt); 103 void recvReqRetry(); 104 105 Gicv3Its(const Gicv3ItsParams *params); 106 107 void setGIC(Gicv3 *_gic); 108 109 static const uint32_t itsControl = 0x0; 110 static const uint32_t itsTranslate = 0x10000; 111 112 // Address range part of Control frame 113 static const AddrRange GITS_BASER; 114 115 static const uint32_t NUM_BASER_REGS = 8; 116 117 // We currently don't support two level ITS tables 118 // The indirect bit is RAZ/WI for implementations that only 119 // support flat tables. 120 static const uint64_t BASER_INDIRECT = 0x4000000000000000; 121 static const uint64_t BASER_TYPE = 0x0700000000000000; 122 static const uint64_t BASER_ESZ = 0x001F000000000000; 123 static const uint64_t BASER_SZ = 0x00000000000000FF; 124 static const uint64_t BASER_WMASK = 125 ~(BASER_INDIRECT | BASER_TYPE | BASER_ESZ); 126 static const uint64_t BASER_WMASK_UNIMPL = 127 ~(BASER_INDIRECT | BASER_TYPE | BASER_ESZ | BASER_SZ); 128 129 // GITS_CTLR.quiescent mask 130 static const uint32_t CTLR_QUIESCENT; 131 132 enum : Addr 133 { 134 // Control frame 135 GITS_CTLR = itsControl + 0x0000, 136 GITS_IIDR = itsControl + 0x0004, 137 GITS_TYPER = itsControl + 0x0008, 138 GITS_CBASER = itsControl + 0x0080, 139 GITS_CWRITER = itsControl + 0x0088, 140 GITS_CREADR = itsControl + 0x0090, 141 GITS_PIDR2 = itsControl + 0xffe8, 142 143 // Translation frame 144 GITS_TRANSLATER = itsTranslate + 0x0040 145 }; 146 147 AddrRangeList getAddrRanges() const override; 148 149 Tick read(PacketPtr pkt) override; 150 Tick write(PacketPtr pkt) override; 151 152 DrainState drain() override; 153 void serialize(CheckpointOut & cp) const override; 154 void unserialize(CheckpointIn & cp) override; 155 156 void translate(PacketPtr pkt); 157 158 BitUnion32(CTLR) 159 Bitfield<31> quiescent; 160 Bitfield<7, 4> itsNumber; 161 Bitfield<1> imDe; 162 Bitfield<0> enabled; 163 EndBitUnion(CTLR) 164 165 // Command read/write, (CREADR, CWRITER) 166 BitUnion64(CRDWR) 167 Bitfield<63, 32> high; 168 Bitfield<31, 0> low; 169 Bitfield<19, 5> offset; 170 Bitfield<0> retry; 171 Bitfield<0> stalled; 172 EndBitUnion(CRDWR) 173 174 BitUnion64(CBASER) 175 Bitfield<63, 32> high; 176 Bitfield<31, 0> low; 177 Bitfield<63> valid; 178 Bitfield<61, 59> innerCache; 179 Bitfield<55, 53> outerCache; 180 Bitfield<51, 12> physAddr; 181 Bitfield<11, 10> shareability; 182 Bitfield<7, 0> size; 183 EndBitUnion(CBASER) 184 185 BitUnion64(BASER) 186 Bitfield<63> valid; 187 Bitfield<62> indirect; 188 Bitfield<61, 59> innerCache; 189 Bitfield<58, 56> type; 190 Bitfield<55, 53> outerCache; 191 Bitfield<52, 48> entrySize; 192 Bitfield<47, 12> physAddr; 193 Bitfield<11, 10> shareability; 194 Bitfield<9, 8> pageSize; 195 Bitfield<7, 0> size; 196 EndBitUnion(BASER) 197 198 BitUnion64(TYPER) 199 Bitfield<37> vmovp; 200 Bitfield<36> cil; 201 Bitfield<35, 32> cidBits; 202 Bitfield<31, 24> hcc; 203 Bitfield<19> pta; 204 Bitfield<18> seis; 205 Bitfield<17, 13> devBits; 206 Bitfield<12, 8> idBits; 207 Bitfield<7, 4> ittEntrySize; 208 Bitfield<2> cct; 209 Bitfield<1> _virtual; 210 Bitfield<0> physical; 211 EndBitUnion(TYPER) 212 213 CTLR gitsControl; 214 TYPER gitsTyper; 215 CBASER gitsCbaser; 216 CRDWR gitsCreadr; 217 CRDWR gitsCwriter; 218 uint32_t gitsIidr; 219 uint32_t gitsTranslater; 220 221 std::vector<BASER> tableBases; 222 223 /** 224 * Returns TRUE if the eventID supplied has bits above the implemented 225 * size or above the itt_range 226 */ 227 bool idOutOfRange(uint32_t event_id, uint8_t itt_range) const; 228 229 /** 230 * Returns TRUE if the value supplied has bits above the implemented range 231 * or if the value supplied exceeds the maximum configured size in the 232 * appropriate GITS_BASER<n> 233 */ 234 bool deviceOutOfRange(uint32_t device_id) const; 235 236 /** 237 * Returns TRUE if the value (size) supplied exceeds the maximum 238 * allowed by GITS_TYPER.ID_bits. Size is the parameter which is 239 * passed to the ITS via the MAPD command and is stored in the 240 * DTE.ittRange field. 241 */ 242 bool sizeOutOfRange(uint32_t size) const; 243 244 /** 245 * Returns TRUE if the value supplied has bits above the implemented range 246 * or if the value exceeds the total number of collections supported in 247 * hardware and external memory 248 */ 249 bool collectionOutOfRange(uint32_t collection_id) const; 250 251 /** 252 * Returns TRUE if the value supplied is larger than that permitted by 253 * GICD_TYPER.IDbits or not in the LPI range and is not 1023 254 */ 255 bool lpiOutOfRange(uint32_t intid) const; 256 257 private: // Command 258 void checkCommandQueue(); 259 void incrementReadPointer(); 260 261 public: // TableWalk 262 BitUnion64(DTE) 263 Bitfield<57, 53> ittRange; 264 Bitfield<52, 1> ittAddress; 265 Bitfield<0> valid; 266 EndBitUnion(DTE) 267 268 BitUnion64(ITTE) 269 Bitfield<59, 46> vpeid; 270 Bitfield<45, 30> icid; 271 Bitfield<29, 16> intNumHyp; 272 Bitfield<15, 2> intNum; 273 Bitfield<1> intType; 274 Bitfield<0> valid; 275 EndBitUnion(ITTE) 276 277 BitUnion64(CTE) 278 Bitfield<40, 1> rdBase; 279 Bitfield<0> valid; 280 EndBitUnion(CTE) 281 282 enum InterruptType 283 { 284 VIRTUAL_INTERRUPT = 0, 285 PHYSICAL_INTERRUPT = 1 286 }; 287 288 private: 289 Gicv3Redistributor* getRedistributor(uint64_t rd_base); 290 Gicv3Redistributor* getRedistributor(CTE cte) 291 { 292 return getRedistributor(cte.rdBase); 293 } 294 295 ItsAction runProcess(ItsProcess *proc, PacketPtr pkt); 296 ItsAction runProcessTiming(ItsProcess *proc, PacketPtr pkt); 297 ItsAction runProcessAtomic(ItsProcess *proc, PacketPtr pkt); 298 299 enum ItsTables 300 { 301 DEVICE_TABLE = 1, 302 VPE_TABLE = 2, 303 TRANSLATION_TABLE = 3, 304 COLLECTION_TABLE = 4 305 }; 306 307 enum PageSize 308 { 309 SIZE_4K, 310 SIZE_16K, 311 SIZE_64K 312 }; 313 314 Addr pageAddress(enum ItsTables table); 315 316 void moveAllPendingState( 317 Gicv3Redistributor *rd1, Gicv3Redistributor *rd2); 318 319 private: 320 std::queue<ItsAction> packetsToRetry; 321 uint32_t masterId; 322 Gicv3 *gic; 323 EventFunctionWrapper commandEvent; 324 325 bool pendingCommands; 326 uint32_t pendingTranslations; 327}; 328 329/** 330 * ItsProcess is a base coroutine wrapper which is spawned by 331 * the Gicv3Its module when the latter needs to perform different 332 * actions, like translating a peripheral's MSI into an LPI 333 * (See derived ItsTranslation) or processing a Command from the 334 * ITS queue (ItsCommand). 335 * The action to take is implemented by the method: 336 * 337 * virtual void main(Yield &yield) = 0; 338 * It's inheriting from Packet::SenderState since the generic process 339 * will be stopped (we are using coroutines) and sent with the packet 340 * to memory when doing table walks. 341 * When Gicv3Its receives a response, it will resume the coroutine from 342 * the point it stopped when yielding. 343 */ 344class ItsProcess : public Packet::SenderState 345{ 346 public: 347 using DTE = Gicv3Its::DTE; 348 using ITTE = Gicv3Its::ITTE; 349 using CTE = Gicv3Its::CTE; 350 using Coroutine = m5::Coroutine<PacketPtr, ItsAction>; 351 using Yield = Coroutine::CallerType; 352 353 ItsProcess(Gicv3Its &_its); 354 virtual ~ItsProcess(); 355 356 /** Returns the Gicv3Its name. Mainly used for DPRINTS */ 357 const std::string name() const; 358 359 ItsAction run(PacketPtr pkt); 360 361 protected: 362 void reinit(); 363 virtual void main(Yield &yield) = 0; 364 365 void writeDeviceTable(Yield &yield, uint32_t device_id, DTE dte); 366 367 void writeIrqTranslationTable( 368 Yield &yield, const Addr itt_base, uint32_t event_id, ITTE itte); 369 370 void writeIrqCollectionTable( 371 Yield &yield, uint32_t collection_id, CTE cte); 372 373 uint64_t readDeviceTable( 374 Yield &yield, uint32_t device_id); 375 376 uint64_t readIrqTranslationTable( 377 Yield &yield, const Addr itt_base, uint32_t event_id); 378 379 uint64_t readIrqCollectionTable(Yield &yield, uint32_t collection_id); 380 381 void doRead(Yield &yield, Addr addr, void *ptr, size_t size); 382 void doWrite(Yield &yield, Addr addr, void *ptr, size_t size); 383 void terminate(Yield &yield); 384 385 protected: 386 Gicv3Its &its; 387 388 private: 389 std::unique_ptr<Coroutine> coroutine; 390}; 391 392/** 393 * An ItsTranslation is created whenever a peripheral writes a message in 394 * GITS_TRANSLATER (MSI). In this case main will simply do the table walks 395 * until it gets a redistributor and an INTID. It will then raise the 396 * LPI interrupt to the target redistributor. 397 */ 398class ItsTranslation : public ItsProcess 399{ 400 public: 401 ItsTranslation(Gicv3Its &_its); 402 ~ItsTranslation(); 403 404 protected: 405 void main(Yield &yield) override; 406 407 std::pair<uint32_t, Gicv3Redistributor *> 408 translateLPI(Yield &yield, uint32_t device_id, uint32_t event_id); 409}; 410 411/** 412 * An ItsCommand is created whenever there is a new command in the command 413 * queue. Only one command can be executed per time. 414 * main will firstly read the command from memory and then it will process 415 * it. 416 */ 417class ItsCommand : public ItsProcess 418{ 419 public: 420 union CommandEntry 421 { 422 struct 423 { 424 uint32_t type; 425 uint32_t deviceId; 426 uint32_t eventId; 427 uint32_t pintId; 428 429 uint32_t data[4]; 430 }; 431 uint64_t raw[4]; 432 }; 433 434 enum CommandType : uint32_t 435 { 436 CLEAR = 0x04, 437 DISCARD = 0x0F, 438 INT = 0x03, 439 INV = 0x0C, 440 INVALL = 0x0D, 441 MAPC = 0x09, 442 MAPD = 0x08, 443 MAPI = 0x0B, 444 MAPTI = 0x0A, 445 MOVALL = 0x0E, 446 MOVI = 0x01, 447 SYNC = 0x05, 448 VINVALL = 0x2D, 449 VMAPI = 0x2B, 450 VMAPP = 0x29, 451 VMAPTI = 0x2A, 452 VMOVI = 0x21, 453 VMOVP = 0x22, 454 VSYNC = 0x25 455 }; 456 457 ItsCommand(Gicv3Its &_its); 458 ~ItsCommand(); 459 460 protected: 461 /** 462 * Dispatch entry is a metadata struct which contains information about 463 * the command (like the name) and the function object implementing 464 * the command. 465 */ 466 struct DispatchEntry 467 { 468 using ExecFn = std::function<void(ItsCommand*, Yield&, CommandEntry&)>; 469 470 DispatchEntry(std::string _name, ExecFn _exec) 471 : name(_name), exec(_exec) 472 {} 473 474 std::string name; 475 ExecFn exec; 476 }; 477 478 using DispatchTable = std::unordered_map< 479 std::underlying_type<enum CommandType>::type, DispatchEntry>; 480 481 static DispatchTable cmdDispatcher; 482 483 static std::string commandName(uint32_t cmd); 484 485 void main(Yield &yield) override; 486 487 void readCommand(Yield &yield, CommandEntry &command); 488 void processCommand(Yield &yield, CommandEntry &command); 489 490 // Commands 491 void clear(Yield &yield, CommandEntry &command); 492 void discard(Yield &yield, CommandEntry &command); 493 void mapc(Yield &yield, CommandEntry &command); 494 void mapd(Yield &yield, CommandEntry &command); 495 void mapi(Yield &yield, CommandEntry &command); 496 void mapti(Yield &yield, CommandEntry &command); 497 void movall(Yield &yield, CommandEntry &command); 498 void movi(Yield &yield, CommandEntry &command); 499 void sync(Yield &yield, CommandEntry &command); 500 void doInt(Yield &yield, CommandEntry &command); 501 void inv(Yield &yield, CommandEntry &command); 502 void invall(Yield &yield, CommandEntry &command); 503 void vinvall(Yield &yield, CommandEntry &command); 504 void vmapi(Yield &yield, CommandEntry &command); 505 void vmapp(Yield &yield, CommandEntry &command); 506 void vmapti(Yield &yield, CommandEntry &command); 507 void vmovi(Yield &yield, CommandEntry &command); 508 void vmovp(Yield &yield, CommandEntry &command); 509 void vsync(Yield &yield, CommandEntry &command); 510 511 protected: // Helpers 512 bool idOutOfRange(CommandEntry &command, DTE dte) const 513 { 514 return its.idOutOfRange(command.eventId, dte.ittRange); 515 } 516 517 bool deviceOutOfRange(CommandEntry &command) const 518 { 519 return its.deviceOutOfRange(command.deviceId); 520 } 521 522 bool sizeOutOfRange(CommandEntry &command) const 523 { 524 const auto size = bits(command.raw[1], 4, 0); 525 const auto valid = bits(command.raw[2], 63); 526 if (valid) 527 return its.sizeOutOfRange(size); 528 else 529 return false; 530 } 531 532 bool collectionOutOfRange(CommandEntry &command) const 533 { 534 return its.collectionOutOfRange(bits(command.raw[2], 15, 0)); 535 } 536}; 537 538#endif 539