1/*
2 * Copyright (c) 2012, 2017-2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Andreas Sandberg
38 */
39
40#include "dev/arm/base_gic.hh"
41
42#include "cpu/thread_context.hh"
43#include "dev/arm/realview.hh"
44#include "params/ArmInterruptPin.hh"
45#include "params/ArmPPI.hh"
46#include "params/ArmSPI.hh"
47#include "params/BaseGic.hh"
48
49BaseGic::BaseGic(const Params *p)
50        : PioDevice(p),
51          platform(p->platform)
52{
53    RealView *const rv(dynamic_cast<RealView*>(p->platform));
54    // The platform keeps track of the GIC that is hooked up to the
55    // system. Due to quirks in gem5's configuration system, the
56    // platform can't take a GIC as parameter. Instead, we need to
57    // register with the platform when a new GIC is created. If we
58    // can't find a platform, something is seriously wrong.
59    fatal_if(!rv, "GIC model can't register with platform code");
60    rv->setGic(this);
61}
62
63BaseGic::~BaseGic()
64{
65}
66
67void
68BaseGic::init()
69{
70    PioDevice::init();
71    getSystem()->setGIC(this);
72}
73
74const BaseGic::Params *
75BaseGic::params() const
76{
77    return dynamic_cast<const Params *>(_params);
78}
79
80ArmInterruptPinGen::ArmInterruptPinGen(const ArmInterruptPinParams *p)
81  : SimObject(p)
82{
83}
84
85ArmSPIGen::ArmSPIGen(const ArmSPIParams *p)
86    : ArmInterruptPinGen(p), pin(new ArmSPI(p->platform, p->num))
87{
88}
89
90ArmInterruptPin*
91ArmSPIGen::get(ThreadContext* tc)
92{
93    return pin;
94}
95
96ArmPPIGen::ArmPPIGen(const ArmPPIParams *p)
97    : ArmInterruptPinGen(p)
98{
99}
100
101ArmInterruptPin*
102ArmPPIGen::get(ThreadContext* tc)
103{
104    panic_if(!tc, "Invalid Thread Context\n");
105    ContextID cid = tc->contextId();
106
107    auto pin_it = pins.find(cid);
108
109    if (pin_it != pins.end()) {
110        // PPI Pin Already generated
111        return pin_it->second;
112    } else {
113        // Generate PPI Pin
114        auto p = static_cast<const ArmPPIParams *>(_params);
115        ArmPPI *pin = new ArmPPI(p->platform, tc, p->num);
116
117        pins.insert({cid, pin});
118
119        return pin;
120    }
121}
122
123ArmInterruptPin::ArmInterruptPin(
124    Platform  *_platform, ThreadContext *tc, uint32_t int_num)
125      : threadContext(tc), platform(dynamic_cast<RealView*>(_platform)),
126        intNum(int_num)
127{
128    fatal_if(!platform, "Interrupt not connected to a RealView platform");
129}
130
131void
132ArmInterruptPin::setThreadContext(ThreadContext *tc)
133{
134    panic_if(threadContext,
135             "InterruptLine::setThreadContext called twice\n");
136
137    threadContext = tc;
138}
139
140ContextID
141ArmInterruptPin::targetContext() const
142{
143    panic_if(!threadContext, "Per-context interrupt triggered without a " \
144             "call to InterruptLine::setThreadContext.\n");
145    return threadContext->contextId();
146}
147
148ArmSPI::ArmSPI(
149    Platform  *_platform, uint32_t int_num)
150      : ArmInterruptPin(_platform, nullptr, int_num)
151{
152}
153
154void
155ArmSPI::raise()
156{
157    platform->gic->sendInt(intNum);
158}
159
160void
161ArmSPI::clear()
162{
163    platform->gic->clearInt(intNum);
164}
165
166ArmPPI::ArmPPI(
167    Platform  *_platform, ThreadContext *tc, uint32_t int_num)
168      : ArmInterruptPin(_platform, tc, int_num)
169{
170}
171
172void
173ArmPPI::raise()
174{
175    platform->gic->sendPPInt(intNum, targetContext());
176}
177
178void
179ArmPPI::clear()
180{
181    platform->gic->clearPPInt(intNum, targetContext());
182}
183
184ArmSPIGen *
185ArmSPIParams::create()
186{
187    return new ArmSPIGen(this);
188}
189
190ArmPPIGen *
191ArmPPIParams::create()
192{
193    return new ArmPPIGen(this);
194}
195