RealView.py revision 7950
1# Copyright (c) 2009 ARM Limited 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license 9# terms below provided that you ensure that this notice is replicated 10# unmodified and in its entirety in all distributions of the software, 11# modified or unmodified, in source code or in binary form. 12# 13# Copyright (c) 2006-2007 The Regents of The University of Michigan 14# All rights reserved. 15# 16# Redistribution and use in source and binary forms, with or without 17# modification, are permitted provided that the following conditions are 18# met: redistributions of source code must retain the above copyright 19# notice, this list of conditions and the following disclaimer; 20# redistributions in binary form must reproduce the above copyright 21# notice, this list of conditions and the following disclaimer in the 22# documentation and/or other materials provided with the distribution; 23# neither the name of the copyright holders nor the names of its 24# contributors may be used to endorse or promote products derived from 25# this software without specific prior written permission. 26# 27# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 28# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 29# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 30# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 31# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 32# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 33# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 34# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 35# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 36# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 37# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 38# 39# Authors: Ali Saidi 40# Gabe Black 41# William Wang 42 43from m5.params import * 44from m5.proxy import * 45from Device import BasicPioDevice, PioDevice, IsaFake, BadAddr, DmaDevice 46from Platform import Platform 47from Terminal import Terminal 48from Uart import Uart 49 50class AmbaDevice(BasicPioDevice): 51 type = 'AmbaDevice' 52 abstract = True 53 amba_id = Param.UInt32("ID of AMBA device for kernel detection") 54 55class AmbaIntDevice(AmbaDevice): 56 type = 'AmbaIntDevice' 57 abstract = True 58 gic = Param.Gic(Parent.any, "Gic to use for interrupting") 59 int_num = Param.UInt32("Interrupt number that connects to GIC") 60 int_delay = Param.Latency("100ns", 61 "Time between action and interrupt generation by device") 62 63class AmbaDmaDevice(DmaDevice): 64 type = 'AmbaDmaDevice' 65 abstract = True 66 pio_addr = Param.Addr("Address for AMBA slave interface") 67 pio_latency = Param.Latency("10ns", "Time between action and write/read result by AMBA DMA Device") 68 gic = Param.Gic(Parent.any, "Gic to use for interrupting") 69 int_num = Param.UInt32("Interrupt number that connects to GIC") 70 amba_id = Param.UInt32("ID of AMBA device for kernel detection") 71 72class RealViewCtrl(BasicPioDevice): 73 type = 'RealViewCtrl' 74 proc_id = Param.UInt32(0x0C000000, "Platform ID") 75 76class Gic(PioDevice): 77 type = 'Gic' 78 dist_addr = Param.Addr(0x1f001000, "Address for distributor") 79 cpu_addr = Param.Addr(0x1f000100, "Address for cpu") 80 dist_pio_delay = Param.Latency('10ns', "Delay for PIO r/w to distributor") 81 cpu_pio_delay = Param.Latency('10ns', "Delay for PIO r/w to cpu") 82 it_lines = Param.UInt32(128, "Number of interrupt lines supported (max = 1020)") 83 84class AmbaFake(AmbaDevice): 85 type = 'AmbaFake' 86 ignore_access = Param.Bool(False, "Ignore reads/writes to this device, (e.g. IsaFake + AMBA)") 87 amba_id = 0; 88 89class Pl011(Uart): 90 type = 'Pl011' 91 gic = Param.Gic(Parent.any, "Gic to use for interrupting") 92 int_num = Param.UInt32("Interrupt number that connects to GIC") 93 end_on_eot = Param.Bool(False, "End the simulation when a EOT is received on the UART") 94 int_delay = Param.Latency("100ns", "Time between action and interrupt generation by UART") 95 96class Sp804(AmbaDevice): 97 type = 'Sp804' 98 gic = Param.Gic(Parent.any, "Gic to use for interrupting") 99 int_num0 = Param.UInt32("Interrupt number that connects to GIC") 100 clock0 = Param.Clock('1MHz', "Clock speed of the input") 101 int_num1 = Param.UInt32("Interrupt number that connects to GIC") 102 clock1 = Param.Clock('1MHz', "Clock speed of the input") 103 amba_id = 0x00141804 104 105class Pl050(AmbaIntDevice): 106 type = 'Pl050' 107 vnc = Param.VncServer(Parent.any, "Vnc server for remote frame buffer display") 108 is_mouse = Param.Bool(False, "Is this interface a mouse, if not a keyboard") 109 int_delay = '1us' 110 amba_id = 0x00141050 111 112class Pl111(AmbaDmaDevice): 113 type = 'Pl111' 114 clock = Param.Clock('24MHz', "Clock speed of the input") 115 vnc = Param.VncServer(Parent.any, "Vnc server for remote frame buffer display") 116 amba_id = 0x00141111 117 118class RealView(Platform): 119 type = 'RealView' 120 system = Param.System(Parent.any, "system") 121 122# Reference for memory map and interrupt number 123# RealView Platform Baseboard Explore for Cortex-A9 User Guide(ARM DUI 0440A) 124# Chapter 4: Programmer's Reference 125class RealViewPBX(RealView): 126 uart = Pl011(pio_addr=0x10009000, int_num=44) 127 realview_io = RealViewCtrl(pio_addr=0x10000000) 128 gic = Gic() 129 timer0 = Sp804(int_num0=36, int_num1=36, pio_addr=0x10011000) 130 timer1 = Sp804(int_num0=37, int_num1=37, pio_addr=0x10012000) 131 clcd = Pl111(pio_addr=0x10020000, int_num=55) 132 kmi0 = Pl050(pio_addr=0x10006000, int_num=52) 133 kmi1 = Pl050(pio_addr=0x10007000, int_num=53, is_mouse=True) 134 135 l2x0_fake = IsaFake(pio_addr=0x1f002000, pio_size=0xfff) 136 flash_fake = IsaFake(pio_addr=0x40000000, pio_size=0x4000000) 137 dmac_fake = AmbaFake(pio_addr=0x10030000) 138 uart1_fake = AmbaFake(pio_addr=0x1000a000) 139 uart2_fake = AmbaFake(pio_addr=0x1000b000) 140 uart3_fake = AmbaFake(pio_addr=0x1000c000) 141 smc_fake = AmbaFake(pio_addr=0x100e1000) 142 sp810_fake = AmbaFake(pio_addr=0x10001000, ignore_access=True) 143 watchdog_fake = AmbaFake(pio_addr=0x10010000) 144 gpio0_fake = AmbaFake(pio_addr=0x10013000) 145 gpio1_fake = AmbaFake(pio_addr=0x10014000) 146 gpio2_fake = AmbaFake(pio_addr=0x10015000) 147 ssp_fake = AmbaFake(pio_addr=0x1000d000) 148 sci_fake = AmbaFake(pio_addr=0x1000e000) 149 aaci_fake = AmbaFake(pio_addr=0x10004000) 150 mmc_fake = AmbaFake(pio_addr=0x10005000) 151 rtc_fake = AmbaFake(pio_addr=0x10017000, amba_id=0x41031) 152 cf0_fake = IsaFake(pio_addr=0x18000000, pio_size=0xfff) 153 154 155 # Attach I/O devices that are on chip 156 def attachOnChipIO(self, bus): 157 self.gic.pio = bus.port 158 self.l2x0_fake.pio = bus.port 159 160 # Attach I/O devices to specified bus object. Can't do this 161 # earlier, since the bus object itself is typically defined at the 162 # System level. 163 def attachIO(self, bus): 164 self.uart.pio = bus.port 165 self.realview_io.pio = bus.port 166 self.timer0.pio = bus.port 167 self.timer1.pio = bus.port 168 self.clcd.pio = bus.port 169 self.kmi0.pio = bus.port 170 self.kmi1.pio = bus.port 171 self.dmac_fake.pio = bus.port 172 self.uart1_fake.pio = bus.port 173 self.uart2_fake.pio = bus.port 174 self.uart3_fake.pio = bus.port 175 self.smc_fake.pio = bus.port 176 self.sp810_fake.pio = bus.port 177 self.watchdog_fake.pio = bus.port 178 self.gpio0_fake.pio = bus.port 179 self.gpio1_fake.pio = bus.port 180 self.gpio2_fake.pio = bus.port 181 self.ssp_fake.pio = bus.port 182 self.sci_fake.pio = bus.port 183 self.aaci_fake.pio = bus.port 184 self.mmc_fake.pio = bus.port 185 self.rtc_fake.pio = bus.port 186 self.flash_fake.pio = bus.port 187 self.cf0_fake.pio = bus.port 188 189# Reference for memory map and interrupt number 190# RealView Emulation Baseboard User Guide (ARM DUI 0143B) 191# Chapter 4: Programmer's Reference 192class RealViewEB(RealView): 193 uart = Pl011(pio_addr=0x10009000, int_num=44) 194 realview_io = RealViewCtrl(pio_addr=0x10000000) 195 gic = Gic(dist_addr=0x10041000, cpu_addr=0x10040000) 196 timer0 = Sp804(int_num0=36, int_num1=36, pio_addr=0x10011000) 197 timer1 = Sp804(int_num0=37, int_num1=37, pio_addr=0x10012000) 198 clcd = Pl111(pio_addr=0x10020000, int_num=23) 199 kmi0 = Pl050(pio_addr=0x10006000, int_num=20) 200 kmi1 = Pl050(pio_addr=0x10007000, int_num=21, is_mouse=True) 201 202 l2x0_fake = IsaFake(pio_addr=0x1f002000, pio_size=0xfff, warn_access="1") 203 dmac_fake = AmbaFake(pio_addr=0x10030000) 204 uart1_fake = AmbaFake(pio_addr=0x1000a000) 205 uart2_fake = AmbaFake(pio_addr=0x1000b000) 206 uart3_fake = AmbaFake(pio_addr=0x1000c000) 207 smc_fake = AmbaFake(pio_addr=0x100e1000) 208 sp810_fake = AmbaFake(pio_addr=0x10001000, ignore_access=True) 209 watchdog_fake = AmbaFake(pio_addr=0x10010000) 210 gpio0_fake = AmbaFake(pio_addr=0x10013000) 211 gpio1_fake = AmbaFake(pio_addr=0x10014000) 212 gpio2_fake = AmbaFake(pio_addr=0x10015000) 213 ssp_fake = AmbaFake(pio_addr=0x1000d000) 214 sci_fake = AmbaFake(pio_addr=0x1000e000) 215 aaci_fake = AmbaFake(pio_addr=0x10004000) 216 mmc_fake = AmbaFake(pio_addr=0x10005000) 217 rtc_fake = AmbaFake(pio_addr=0x10017000, amba_id=0x41031) 218 219 220 221 # Attach I/O devices that are on chip 222 def attachOnChipIO(self, bus): 223 self.gic.pio = bus.port 224 self.l2x0_fake.pio = bus.port 225 226 # Attach I/O devices to specified bus object. Can't do this 227 # earlier, since the bus object itself is typically defined at the 228 # System level. 229 def attachIO(self, bus): 230 self.uart.pio = bus.port 231 self.realview_io.pio = bus.port 232 self.timer0.pio = bus.port 233 self.timer1.pio = bus.port 234 self.clcd.pio = bus.port 235 self.kmi0.pio = bus.port 236 self.kmi1.pio = bus.port 237 self.dmac_fake.pio = bus.port 238 self.uart1_fake.pio = bus.port 239 self.uart2_fake.pio = bus.port 240 self.uart3_fake.pio = bus.port 241 self.smc_fake.pio = bus.port 242 self.sp810_fake.pio = bus.port 243 self.watchdog_fake.pio = bus.port 244 self.gpio0_fake.pio = bus.port 245 self.gpio1_fake.pio = bus.port 246 self.gpio2_fake.pio = bus.port 247 self.ssp_fake.pio = bus.port 248 self.sci_fake.pio = bus.port 249 self.aaci_fake.pio = bus.port 250 self.mmc_fake.pio = bus.port 251 self.rtc_fake.pio = bus.port 252 253