backdoor.cc revision 8741
12SN/A/*
21762SN/A * Copyright (c) 2001-2005 The Regents of The University of Michigan
32SN/A * All rights reserved.
42SN/A *
52SN/A * Redistribution and use in source and binary forms, with or without
62SN/A * modification, are permitted provided that the following conditions are
72SN/A * met: redistributions of source code must retain the above copyright
82SN/A * notice, this list of conditions and the following disclaimer;
92SN/A * redistributions in binary form must reproduce the above copyright
102SN/A * notice, this list of conditions and the following disclaimer in the
112SN/A * documentation and/or other materials provided with the distribution;
122SN/A * neither the name of the copyright holders nor the names of its
132SN/A * contributors may be used to endorse or promote products derived from
142SN/A * this software without specific prior written permission.
152SN/A *
162SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
172SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
182SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
192SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
202SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
212SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
222SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
232SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
242SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
252SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
262SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272665SN/A *
282665SN/A * Authors: Nathan Binkert
292665SN/A *          Ali Saidi
302665SN/A *          Steve Reinhardt
312665SN/A *          Erik Hallnor
322SN/A */
332SN/A
341722SN/A/** @file
355480Snate@binkert.org * Alpha Console Backdoor Definition
362SN/A */
372SN/A
38146SN/A#include <cstddef>
392SN/A#include <string>
402SN/A
418739Sgblack@eecs.umich.edu#include "config/full_system.hh"
428739Sgblack@eecs.umich.edu
438739Sgblack@eecs.umich.edu#if FULL_SYSTEM //XXX No AlphaSystem in SE mode.
442158SN/A#include "arch/alpha/system.hh"
458739Sgblack@eecs.umich.edu#endif
46146SN/A#include "base/inifile.hh"
471805SN/A#include "base/str.hh"
48146SN/A#include "base/trace.hh"
491717SN/A#include "cpu/base.hh"
502680SN/A#include "cpu/thread_context.hh"
518232Snate@binkert.org#include "debug/AlphaBackdoor.hh"
525480Snate@binkert.org#include "dev/alpha/backdoor.hh"
538741Sgblack@eecs.umich.edu#include "dev/alpha/tsunami.hh"
548741Sgblack@eecs.umich.edu#include "dev/alpha/tsunami_cchip.hh"
558741Sgblack@eecs.umich.edu#include "dev/alpha/tsunami_io.hh"
562521SN/A#include "dev/platform.hh"
5756SN/A#include "dev/simple_disk.hh"
585478SN/A#include "dev/terminal.hh"
593348SN/A#include "mem/packet.hh"
603348SN/A#include "mem/packet_access.hh"
612521SN/A#include "mem/physical.hh"
625480Snate@binkert.org#include "params/AlphaBackdoor.hh"
631805SN/A#include "sim/sim_object.hh"
642SN/A
652SN/Ausing namespace std;
662107SN/Ausing namespace AlphaISA;
672SN/A
685480Snate@binkert.orgAlphaBackdoor::AlphaBackdoor(const Params *p)
695478SN/A    : BasicPioDevice(p), disk(p->disk), terminal(p->terminal),
708739Sgblack@eecs.umich.edu#if FULL_SYSTEM //XXX No system pointer in SE mode.
718739Sgblack@eecs.umich.edu      system(p->system),
728739Sgblack@eecs.umich.edu#endif
738739Sgblack@eecs.umich.edu      cpu(p->cpu)
742SN/A{
75545SN/A
762521SN/A    pioSize = sizeof(struct AlphaAccess);
772521SN/A
782521SN/A    alphaAccess = new Access();
792521SN/A    alphaAccess->last_offset = pioSize - 1;
802SN/A
812SN/A    alphaAccess->version = ALPHA_ACCESS_VERSION;
822SN/A    alphaAccess->diskUnit = 1;
83926SN/A
84926SN/A    alphaAccess->diskCount = 0;
85926SN/A    alphaAccess->diskPAddr = 0;
86926SN/A    alphaAccess->diskBlock = 0;
87926SN/A    alphaAccess->diskOperation = 0;
88926SN/A    alphaAccess->outputChar = 0;
89926SN/A    alphaAccess->inputChar = 0;
904395SN/A    std::memset(alphaAccess->cpuStack, 0, sizeof(alphaAccess->cpuStack));
911805SN/A
922SN/A}
932SN/A
941634SN/Avoid
955480Snate@binkert.orgAlphaBackdoor::startup()
961634SN/A{
978739Sgblack@eecs.umich.edu#if FULL_SYSTEM //XXX No system pointer in SE mode.
982549SN/A    system->setAlphaAccess(pioAddr);
995714Shsul@eecs.umich.edu    alphaAccess->numCPUs = system->numContexts();
1001634SN/A    alphaAccess->kernStart = system->getKernelStart();
1011634SN/A    alphaAccess->kernEnd = system->getKernelEnd();
1021634SN/A    alphaAccess->entryPoint = system->getKernelEntry();
1031634SN/A    alphaAccess->mem_size = system->physmem->size();
1041634SN/A    alphaAccess->cpuClock = cpu->frequency() / 1000000; // In MHz
1058741Sgblack@eecs.umich.edu    Tsunami *tsunami = dynamic_cast<Tsunami *>(params()->platform);
1068741Sgblack@eecs.umich.edu    assert(tsunami);
1078741Sgblack@eecs.umich.edu    alphaAccess->intrClockFrequency = tsunami->io->frequency();
1088739Sgblack@eecs.umich.edu#endif
1091634SN/A}
1101634SN/A
1112512SN/ATick
1125480Snate@binkert.orgAlphaBackdoor::read(PacketPtr pkt)
1132SN/A{
1142SN/A
1152512SN/A    /** XXX Do we want to push the addr munging to a bus brige or something? So
1162512SN/A     * the device has it's physical address and then the bridge adds on whatever
1172512SN/A     * machine dependent address swizzle is required?
1182512SN/A     */
119540SN/A
1202641SN/A    assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
1212522SN/A
1222641SN/A    Addr daddr = pkt->getAddr() - pioAddr;
1232512SN/A
1242630SN/A    pkt->allocate();
1254986SN/A    pkt->makeAtomicResponse();
1262521SN/A
1272641SN/A    switch (pkt->getSize())
128873SN/A    {
129873SN/A        case sizeof(uint32_t):
130873SN/A            switch (daddr)
131873SN/A            {
132873SN/A                case offsetof(AlphaAccess, last_offset):
1332630SN/A                    pkt->set(alphaAccess->last_offset);
134873SN/A                    break;
135873SN/A                case offsetof(AlphaAccess, version):
1362630SN/A                    pkt->set(alphaAccess->version);
137873SN/A                    break;
138873SN/A                case offsetof(AlphaAccess, numCPUs):
1392630SN/A                    pkt->set(alphaAccess->numCPUs);
140873SN/A                    break;
141873SN/A                case offsetof(AlphaAccess, intrClockFrequency):
1422630SN/A                    pkt->set(alphaAccess->intrClockFrequency);
143873SN/A                    break;
144873SN/A                default:
1452512SN/A                    /* Old console code read in everyting as a 32bit int
1462512SN/A                     * we now break that for better error checking.
1472512SN/A                     */
1484870SN/A                  pkt->setBadAddress();
149873SN/A            }
1505480Snate@binkert.org            DPRINTF(AlphaBackdoor, "read: offset=%#x val=%#x\n", daddr,
1512630SN/A                    pkt->get<uint32_t>());
152873SN/A            break;
153873SN/A        case sizeof(uint64_t):
154873SN/A            switch (daddr)
155873SN/A            {
156873SN/A                case offsetof(AlphaAccess, inputChar):
1575478SN/A                    pkt->set(terminal->console_in());
158873SN/A                    break;
159873SN/A                case offsetof(AlphaAccess, cpuClock):
1602630SN/A                    pkt->set(alphaAccess->cpuClock);
161873SN/A                    break;
162873SN/A                case offsetof(AlphaAccess, mem_size):
1632630SN/A                    pkt->set(alphaAccess->mem_size);
164873SN/A                    break;
165873SN/A                case offsetof(AlphaAccess, kernStart):
1662630SN/A                    pkt->set(alphaAccess->kernStart);
167873SN/A                    break;
168873SN/A                case offsetof(AlphaAccess, kernEnd):
1692630SN/A                    pkt->set(alphaAccess->kernEnd);
170873SN/A                    break;
171873SN/A                case offsetof(AlphaAccess, entryPoint):
1722630SN/A                    pkt->set(alphaAccess->entryPoint);
173873SN/A                    break;
174873SN/A                case offsetof(AlphaAccess, diskUnit):
1752630SN/A                    pkt->set(alphaAccess->diskUnit);
176873SN/A                    break;
177873SN/A                case offsetof(AlphaAccess, diskCount):
1782630SN/A                    pkt->set(alphaAccess->diskCount);
179873SN/A                    break;
180873SN/A                case offsetof(AlphaAccess, diskPAddr):
1812630SN/A                    pkt->set(alphaAccess->diskPAddr);
182873SN/A                    break;
183873SN/A                case offsetof(AlphaAccess, diskBlock):
1842630SN/A                    pkt->set(alphaAccess->diskBlock);
185873SN/A                    break;
186873SN/A                case offsetof(AlphaAccess, diskOperation):
1872630SN/A                    pkt->set(alphaAccess->diskOperation);
188873SN/A                    break;
189873SN/A                case offsetof(AlphaAccess, outputChar):
1902630SN/A                    pkt->set(alphaAccess->outputChar);
191873SN/A                    break;
192873SN/A                default:
1932114SN/A                    int cpunum = (daddr - offsetof(AlphaAccess, cpuStack)) /
1942114SN/A                                 sizeof(alphaAccess->cpuStack[0]);
1952114SN/A
1962114SN/A                    if (cpunum >= 0 && cpunum < 64)
1972630SN/A                        pkt->set(alphaAccess->cpuStack[cpunum]);
1982114SN/A                    else
1992114SN/A                        panic("Unknown 64bit access, %#x\n", daddr);
200873SN/A            }
2015480Snate@binkert.org            DPRINTF(AlphaBackdoor, "read: offset=%#x val=%#x\n", daddr,
2022630SN/A                    pkt->get<uint64_t>());
203873SN/A            break;
204873SN/A        default:
2054870SN/A          pkt->setBadAddress();
2062SN/A    }
2072512SN/A    return pioDelay;
2082SN/A}
2092SN/A
2102512SN/ATick
2115480Snate@binkert.orgAlphaBackdoor::write(PacketPtr pkt)
2122SN/A{
2132641SN/A    assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
2142641SN/A    Addr daddr = pkt->getAddr() - pioAddr;
215430SN/A
2162630SN/A    uint64_t val = pkt->get<uint64_t>();
2172641SN/A    assert(pkt->getSize() == sizeof(uint64_t));
2182SN/A
219430SN/A    switch (daddr) {
220430SN/A      case offsetof(AlphaAccess, diskUnit):
2212SN/A        alphaAccess->diskUnit = val;
222430SN/A        break;
2232SN/A
224430SN/A      case offsetof(AlphaAccess, diskCount):
2252SN/A        alphaAccess->diskCount = val;
226430SN/A        break;
2272SN/A
228430SN/A      case offsetof(AlphaAccess, diskPAddr):
2292SN/A        alphaAccess->diskPAddr = val;
230430SN/A        break;
2312SN/A
232430SN/A      case offsetof(AlphaAccess, diskBlock):
2332SN/A        alphaAccess->diskBlock = val;
234430SN/A        break;
2352SN/A
236430SN/A      case offsetof(AlphaAccess, diskOperation):
2372SN/A        if (val == 0x13)
2382SN/A            disk->read(alphaAccess->diskPAddr, alphaAccess->diskBlock,
2392SN/A                       alphaAccess->diskCount);
2402SN/A        else
2412SN/A            panic("Invalid disk operation!");
2422SN/A
243430SN/A        break;
2442SN/A
245430SN/A      case offsetof(AlphaAccess, outputChar):
2465478SN/A        terminal->out((char)(val & 0xff));
247430SN/A        break;
2482SN/A
249430SN/A      default:
2502114SN/A        int cpunum = (daddr - offsetof(AlphaAccess, cpuStack)) /
2512114SN/A                     sizeof(alphaAccess->cpuStack[0]);
2527823Ssteve.reinhardt@amd.com        inform("Launching CPU %d @ %d", cpunum, curTick());
2532114SN/A        assert(val > 0 && "Must not access primary cpu");
2542114SN/A        if (cpunum >= 0 && cpunum < 64)
2552114SN/A            alphaAccess->cpuStack[cpunum] = val;
2562114SN/A        else
2572114SN/A            panic("Unknown 64bit access, %#x\n", daddr);
2582SN/A    }
2592SN/A
2604870SN/A    pkt->makeAtomicResponse();
2612SN/A
2622512SN/A    return pioDelay;
263545SN/A}
264545SN/A
2652SN/Avoid
2665480Snate@binkert.orgAlphaBackdoor::Access::serialize(ostream &os)
2672SN/A{
268222SN/A    SERIALIZE_SCALAR(last_offset);
269222SN/A    SERIALIZE_SCALAR(version);
270222SN/A    SERIALIZE_SCALAR(numCPUs);
271222SN/A    SERIALIZE_SCALAR(mem_size);
272222SN/A    SERIALIZE_SCALAR(cpuClock);
273222SN/A    SERIALIZE_SCALAR(intrClockFrequency);
274222SN/A    SERIALIZE_SCALAR(kernStart);
275222SN/A    SERIALIZE_SCALAR(kernEnd);
276222SN/A    SERIALIZE_SCALAR(entryPoint);
277222SN/A    SERIALIZE_SCALAR(diskUnit);
278222SN/A    SERIALIZE_SCALAR(diskCount);
279222SN/A    SERIALIZE_SCALAR(diskPAddr);
280222SN/A    SERIALIZE_SCALAR(diskBlock);
281222SN/A    SERIALIZE_SCALAR(diskOperation);
282222SN/A    SERIALIZE_SCALAR(outputChar);
283430SN/A    SERIALIZE_SCALAR(inputChar);
2842114SN/A    SERIALIZE_ARRAY(cpuStack,64);
2852SN/A}
2862SN/A
2872SN/Avoid
2885480Snate@binkert.orgAlphaBackdoor::Access::unserialize(Checkpoint *cp, const std::string &section)
2892SN/A{
290222SN/A    UNSERIALIZE_SCALAR(last_offset);
291222SN/A    UNSERIALIZE_SCALAR(version);
292222SN/A    UNSERIALIZE_SCALAR(numCPUs);
293222SN/A    UNSERIALIZE_SCALAR(mem_size);
294222SN/A    UNSERIALIZE_SCALAR(cpuClock);
295222SN/A    UNSERIALIZE_SCALAR(intrClockFrequency);
296222SN/A    UNSERIALIZE_SCALAR(kernStart);
297222SN/A    UNSERIALIZE_SCALAR(kernEnd);
298222SN/A    UNSERIALIZE_SCALAR(entryPoint);
299222SN/A    UNSERIALIZE_SCALAR(diskUnit);
300222SN/A    UNSERIALIZE_SCALAR(diskCount);
301222SN/A    UNSERIALIZE_SCALAR(diskPAddr);
302222SN/A    UNSERIALIZE_SCALAR(diskBlock);
303222SN/A    UNSERIALIZE_SCALAR(diskOperation);
304222SN/A    UNSERIALIZE_SCALAR(outputChar);
305430SN/A    UNSERIALIZE_SCALAR(inputChar);
3062114SN/A    UNSERIALIZE_ARRAY(cpuStack, 64);
307217SN/A}
3082SN/A
309217SN/Avoid
3105480Snate@binkert.orgAlphaBackdoor::serialize(ostream &os)
311217SN/A{
312217SN/A    alphaAccess->serialize(os);
313217SN/A}
314217SN/A
315217SN/Avoid
3165480Snate@binkert.orgAlphaBackdoor::unserialize(Checkpoint *cp, const std::string &section)
317217SN/A{
318237SN/A    alphaAccess->unserialize(cp, section);
3192SN/A}
3202SN/A
3215480Snate@binkert.orgAlphaBackdoor *
3225480Snate@binkert.orgAlphaBackdoorParams::create()
3232SN/A{
3245480Snate@binkert.org    return new AlphaBackdoor(this);
3252SN/A}
326