backdoor.cc revision 8739
12SN/A/* 21762SN/A * Copyright (c) 2001-2005 The Regents of The University of Michigan 32SN/A * All rights reserved. 42SN/A * 52SN/A * Redistribution and use in source and binary forms, with or without 62SN/A * modification, are permitted provided that the following conditions are 72SN/A * met: redistributions of source code must retain the above copyright 82SN/A * notice, this list of conditions and the following disclaimer; 92SN/A * redistributions in binary form must reproduce the above copyright 102SN/A * notice, this list of conditions and the following disclaimer in the 112SN/A * documentation and/or other materials provided with the distribution; 122SN/A * neither the name of the copyright holders nor the names of its 132SN/A * contributors may be used to endorse or promote products derived from 142SN/A * this software without specific prior written permission. 152SN/A * 162SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272665SN/A * 282665SN/A * Authors: Nathan Binkert 292665SN/A * Ali Saidi 302665SN/A * Steve Reinhardt 312665SN/A * Erik Hallnor 322SN/A */ 332SN/A 341722SN/A/** @file 355480Snate@binkert.org * Alpha Console Backdoor Definition 362SN/A */ 372SN/A 38146SN/A#include <cstddef> 392SN/A#include <string> 402SN/A 418739Sgblack@eecs.umich.edu#include "config/full_system.hh" 428739Sgblack@eecs.umich.edu 438739Sgblack@eecs.umich.edu#if FULL_SYSTEM //XXX No AlphaSystem in SE mode. 442158SN/A#include "arch/alpha/system.hh" 458739Sgblack@eecs.umich.edu#endif 46146SN/A#include "base/inifile.hh" 471805SN/A#include "base/str.hh" 48146SN/A#include "base/trace.hh" 491717SN/A#include "cpu/base.hh" 502680SN/A#include "cpu/thread_context.hh" 518232Snate@binkert.org#include "debug/AlphaBackdoor.hh" 525480Snate@binkert.org#include "dev/alpha/backdoor.hh" 532521SN/A#include "dev/platform.hh" 5456SN/A#include "dev/simple_disk.hh" 555478SN/A#include "dev/terminal.hh" 563348SN/A#include "mem/packet.hh" 573348SN/A#include "mem/packet_access.hh" 582521SN/A#include "mem/physical.hh" 595480Snate@binkert.org#include "params/AlphaBackdoor.hh" 601805SN/A#include "sim/sim_object.hh" 612SN/A 622SN/Ausing namespace std; 632107SN/Ausing namespace AlphaISA; 642SN/A 655480Snate@binkert.orgAlphaBackdoor::AlphaBackdoor(const Params *p) 665478SN/A : BasicPioDevice(p), disk(p->disk), terminal(p->terminal), 678739Sgblack@eecs.umich.edu#if FULL_SYSTEM //XXX No system pointer in SE mode. 688739Sgblack@eecs.umich.edu system(p->system), 698739Sgblack@eecs.umich.edu#endif 708739Sgblack@eecs.umich.edu cpu(p->cpu) 712SN/A{ 72545SN/A 732521SN/A pioSize = sizeof(struct AlphaAccess); 742521SN/A 752521SN/A alphaAccess = new Access(); 762521SN/A alphaAccess->last_offset = pioSize - 1; 772SN/A 782SN/A alphaAccess->version = ALPHA_ACCESS_VERSION; 792SN/A alphaAccess->diskUnit = 1; 80926SN/A 81926SN/A alphaAccess->diskCount = 0; 82926SN/A alphaAccess->diskPAddr = 0; 83926SN/A alphaAccess->diskBlock = 0; 84926SN/A alphaAccess->diskOperation = 0; 85926SN/A alphaAccess->outputChar = 0; 86926SN/A alphaAccess->inputChar = 0; 874395SN/A std::memset(alphaAccess->cpuStack, 0, sizeof(alphaAccess->cpuStack)); 881805SN/A 892SN/A} 902SN/A 911634SN/Avoid 925480Snate@binkert.orgAlphaBackdoor::startup() 931634SN/A{ 948739Sgblack@eecs.umich.edu#if FULL_SYSTEM //XXX No system pointer in SE mode. 952549SN/A system->setAlphaAccess(pioAddr); 965714Shsul@eecs.umich.edu alphaAccess->numCPUs = system->numContexts(); 971634SN/A alphaAccess->kernStart = system->getKernelStart(); 981634SN/A alphaAccess->kernEnd = system->getKernelEnd(); 991634SN/A alphaAccess->entryPoint = system->getKernelEntry(); 1001634SN/A alphaAccess->mem_size = system->physmem->size(); 1011634SN/A alphaAccess->cpuClock = cpu->frequency() / 1000000; // In MHz 1022521SN/A alphaAccess->intrClockFrequency = params()->platform->intrFrequency(); 1038739Sgblack@eecs.umich.edu#endif 1041634SN/A} 1051634SN/A 1062512SN/ATick 1075480Snate@binkert.orgAlphaBackdoor::read(PacketPtr pkt) 1082SN/A{ 1092SN/A 1102512SN/A /** XXX Do we want to push the addr munging to a bus brige or something? So 1112512SN/A * the device has it's physical address and then the bridge adds on whatever 1122512SN/A * machine dependent address swizzle is required? 1132512SN/A */ 114540SN/A 1152641SN/A assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize); 1162522SN/A 1172641SN/A Addr daddr = pkt->getAddr() - pioAddr; 1182512SN/A 1192630SN/A pkt->allocate(); 1204986SN/A pkt->makeAtomicResponse(); 1212521SN/A 1222641SN/A switch (pkt->getSize()) 123873SN/A { 124873SN/A case sizeof(uint32_t): 125873SN/A switch (daddr) 126873SN/A { 127873SN/A case offsetof(AlphaAccess, last_offset): 1282630SN/A pkt->set(alphaAccess->last_offset); 129873SN/A break; 130873SN/A case offsetof(AlphaAccess, version): 1312630SN/A pkt->set(alphaAccess->version); 132873SN/A break; 133873SN/A case offsetof(AlphaAccess, numCPUs): 1342630SN/A pkt->set(alphaAccess->numCPUs); 135873SN/A break; 136873SN/A case offsetof(AlphaAccess, intrClockFrequency): 1372630SN/A pkt->set(alphaAccess->intrClockFrequency); 138873SN/A break; 139873SN/A default: 1402512SN/A /* Old console code read in everyting as a 32bit int 1412512SN/A * we now break that for better error checking. 1422512SN/A */ 1434870SN/A pkt->setBadAddress(); 144873SN/A } 1455480Snate@binkert.org DPRINTF(AlphaBackdoor, "read: offset=%#x val=%#x\n", daddr, 1462630SN/A pkt->get<uint32_t>()); 147873SN/A break; 148873SN/A case sizeof(uint64_t): 149873SN/A switch (daddr) 150873SN/A { 151873SN/A case offsetof(AlphaAccess, inputChar): 1525478SN/A pkt->set(terminal->console_in()); 153873SN/A break; 154873SN/A case offsetof(AlphaAccess, cpuClock): 1552630SN/A pkt->set(alphaAccess->cpuClock); 156873SN/A break; 157873SN/A case offsetof(AlphaAccess, mem_size): 1582630SN/A pkt->set(alphaAccess->mem_size); 159873SN/A break; 160873SN/A case offsetof(AlphaAccess, kernStart): 1612630SN/A pkt->set(alphaAccess->kernStart); 162873SN/A break; 163873SN/A case offsetof(AlphaAccess, kernEnd): 1642630SN/A pkt->set(alphaAccess->kernEnd); 165873SN/A break; 166873SN/A case offsetof(AlphaAccess, entryPoint): 1672630SN/A pkt->set(alphaAccess->entryPoint); 168873SN/A break; 169873SN/A case offsetof(AlphaAccess, diskUnit): 1702630SN/A pkt->set(alphaAccess->diskUnit); 171873SN/A break; 172873SN/A case offsetof(AlphaAccess, diskCount): 1732630SN/A pkt->set(alphaAccess->diskCount); 174873SN/A break; 175873SN/A case offsetof(AlphaAccess, diskPAddr): 1762630SN/A pkt->set(alphaAccess->diskPAddr); 177873SN/A break; 178873SN/A case offsetof(AlphaAccess, diskBlock): 1792630SN/A pkt->set(alphaAccess->diskBlock); 180873SN/A break; 181873SN/A case offsetof(AlphaAccess, diskOperation): 1822630SN/A pkt->set(alphaAccess->diskOperation); 183873SN/A break; 184873SN/A case offsetof(AlphaAccess, outputChar): 1852630SN/A pkt->set(alphaAccess->outputChar); 186873SN/A break; 187873SN/A default: 1882114SN/A int cpunum = (daddr - offsetof(AlphaAccess, cpuStack)) / 1892114SN/A sizeof(alphaAccess->cpuStack[0]); 1902114SN/A 1912114SN/A if (cpunum >= 0 && cpunum < 64) 1922630SN/A pkt->set(alphaAccess->cpuStack[cpunum]); 1932114SN/A else 1942114SN/A panic("Unknown 64bit access, %#x\n", daddr); 195873SN/A } 1965480Snate@binkert.org DPRINTF(AlphaBackdoor, "read: offset=%#x val=%#x\n", daddr, 1972630SN/A pkt->get<uint64_t>()); 198873SN/A break; 199873SN/A default: 2004870SN/A pkt->setBadAddress(); 2012SN/A } 2022512SN/A return pioDelay; 2032SN/A} 2042SN/A 2052512SN/ATick 2065480Snate@binkert.orgAlphaBackdoor::write(PacketPtr pkt) 2072SN/A{ 2082641SN/A assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize); 2092641SN/A Addr daddr = pkt->getAddr() - pioAddr; 210430SN/A 2112630SN/A uint64_t val = pkt->get<uint64_t>(); 2122641SN/A assert(pkt->getSize() == sizeof(uint64_t)); 2132SN/A 214430SN/A switch (daddr) { 215430SN/A case offsetof(AlphaAccess, diskUnit): 2162SN/A alphaAccess->diskUnit = val; 217430SN/A break; 2182SN/A 219430SN/A case offsetof(AlphaAccess, diskCount): 2202SN/A alphaAccess->diskCount = val; 221430SN/A break; 2222SN/A 223430SN/A case offsetof(AlphaAccess, diskPAddr): 2242SN/A alphaAccess->diskPAddr = val; 225430SN/A break; 2262SN/A 227430SN/A case offsetof(AlphaAccess, diskBlock): 2282SN/A alphaAccess->diskBlock = val; 229430SN/A break; 2302SN/A 231430SN/A case offsetof(AlphaAccess, diskOperation): 2322SN/A if (val == 0x13) 2332SN/A disk->read(alphaAccess->diskPAddr, alphaAccess->diskBlock, 2342SN/A alphaAccess->diskCount); 2352SN/A else 2362SN/A panic("Invalid disk operation!"); 2372SN/A 238430SN/A break; 2392SN/A 240430SN/A case offsetof(AlphaAccess, outputChar): 2415478SN/A terminal->out((char)(val & 0xff)); 242430SN/A break; 2432SN/A 244430SN/A default: 2452114SN/A int cpunum = (daddr - offsetof(AlphaAccess, cpuStack)) / 2462114SN/A sizeof(alphaAccess->cpuStack[0]); 2477823Ssteve.reinhardt@amd.com inform("Launching CPU %d @ %d", cpunum, curTick()); 2482114SN/A assert(val > 0 && "Must not access primary cpu"); 2492114SN/A if (cpunum >= 0 && cpunum < 64) 2502114SN/A alphaAccess->cpuStack[cpunum] = val; 2512114SN/A else 2522114SN/A panic("Unknown 64bit access, %#x\n", daddr); 2532SN/A } 2542SN/A 2554870SN/A pkt->makeAtomicResponse(); 2562SN/A 2572512SN/A return pioDelay; 258545SN/A} 259545SN/A 2602SN/Avoid 2615480Snate@binkert.orgAlphaBackdoor::Access::serialize(ostream &os) 2622SN/A{ 263222SN/A SERIALIZE_SCALAR(last_offset); 264222SN/A SERIALIZE_SCALAR(version); 265222SN/A SERIALIZE_SCALAR(numCPUs); 266222SN/A SERIALIZE_SCALAR(mem_size); 267222SN/A SERIALIZE_SCALAR(cpuClock); 268222SN/A SERIALIZE_SCALAR(intrClockFrequency); 269222SN/A SERIALIZE_SCALAR(kernStart); 270222SN/A SERIALIZE_SCALAR(kernEnd); 271222SN/A SERIALIZE_SCALAR(entryPoint); 272222SN/A SERIALIZE_SCALAR(diskUnit); 273222SN/A SERIALIZE_SCALAR(diskCount); 274222SN/A SERIALIZE_SCALAR(diskPAddr); 275222SN/A SERIALIZE_SCALAR(diskBlock); 276222SN/A SERIALIZE_SCALAR(diskOperation); 277222SN/A SERIALIZE_SCALAR(outputChar); 278430SN/A SERIALIZE_SCALAR(inputChar); 2792114SN/A SERIALIZE_ARRAY(cpuStack,64); 2802SN/A} 2812SN/A 2822SN/Avoid 2835480Snate@binkert.orgAlphaBackdoor::Access::unserialize(Checkpoint *cp, const std::string §ion) 2842SN/A{ 285222SN/A UNSERIALIZE_SCALAR(last_offset); 286222SN/A UNSERIALIZE_SCALAR(version); 287222SN/A UNSERIALIZE_SCALAR(numCPUs); 288222SN/A UNSERIALIZE_SCALAR(mem_size); 289222SN/A UNSERIALIZE_SCALAR(cpuClock); 290222SN/A UNSERIALIZE_SCALAR(intrClockFrequency); 291222SN/A UNSERIALIZE_SCALAR(kernStart); 292222SN/A UNSERIALIZE_SCALAR(kernEnd); 293222SN/A UNSERIALIZE_SCALAR(entryPoint); 294222SN/A UNSERIALIZE_SCALAR(diskUnit); 295222SN/A UNSERIALIZE_SCALAR(diskCount); 296222SN/A UNSERIALIZE_SCALAR(diskPAddr); 297222SN/A UNSERIALIZE_SCALAR(diskBlock); 298222SN/A UNSERIALIZE_SCALAR(diskOperation); 299222SN/A UNSERIALIZE_SCALAR(outputChar); 300430SN/A UNSERIALIZE_SCALAR(inputChar); 3012114SN/A UNSERIALIZE_ARRAY(cpuStack, 64); 302217SN/A} 3032SN/A 304217SN/Avoid 3055480Snate@binkert.orgAlphaBackdoor::serialize(ostream &os) 306217SN/A{ 307217SN/A alphaAccess->serialize(os); 308217SN/A} 309217SN/A 310217SN/Avoid 3115480Snate@binkert.orgAlphaBackdoor::unserialize(Checkpoint *cp, const std::string §ion) 312217SN/A{ 313237SN/A alphaAccess->unserialize(cp, section); 3142SN/A} 3152SN/A 3165480Snate@binkert.orgAlphaBackdoor * 3175480Snate@binkert.orgAlphaBackdoorParams::create() 3182SN/A{ 3195480Snate@binkert.org return new AlphaBackdoor(this); 3202SN/A} 321