backdoor.cc revision 2522
12810SN/A/* 212724Snikos.nikoleris@arm.com * Copyright (c) 2001-2005 The Regents of The University of Michigan 38856Sandreas.hansson@arm.com * All rights reserved. 48856Sandreas.hansson@arm.com * 58856Sandreas.hansson@arm.com * Redistribution and use in source and binary forms, with or without 68856Sandreas.hansson@arm.com * modification, are permitted provided that the following conditions are 78856Sandreas.hansson@arm.com * met: redistributions of source code must retain the above copyright 88856Sandreas.hansson@arm.com * notice, this list of conditions and the following disclaimer; 98856Sandreas.hansson@arm.com * redistributions in binary form must reproduce the above copyright 108856Sandreas.hansson@arm.com * notice, this list of conditions and the following disclaimer in the 118856Sandreas.hansson@arm.com * documentation and/or other materials provided with the distribution; 128856Sandreas.hansson@arm.com * neither the name of the copyright holders nor the names of its 138856Sandreas.hansson@arm.com * contributors may be used to endorse or promote products derived from 142810SN/A * this software without specific prior written permission. 152810SN/A * 162810SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172810SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182810SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192810SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202810SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212810SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222810SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232810SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242810SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252810SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262810SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272810SN/A */ 282810SN/A 292810SN/A/** @file 302810SN/A * Alpha Console Definition 312810SN/A */ 322810SN/A 332810SN/A#include <cstddef> 342810SN/A#include <cstdio> 352810SN/A#include <string> 362810SN/A 372810SN/A#include "arch/alpha/system.hh" 382810SN/A#include "base/inifile.hh" 392810SN/A#include "base/str.hh" 402810SN/A#include "base/trace.hh" 4112724Snikos.nikoleris@arm.com#include "cpu/base.hh" 422810SN/A#include "cpu/exec_context.hh" 432810SN/A#include "dev/alpha_console.hh" 442810SN/A#include "dev/platform.hh" 452810SN/A#include "dev/simconsole.hh" 462810SN/A#include "dev/simple_disk.hh" 472810SN/A#include "mem/physical.hh" 482810SN/A#include "sim/builder.hh" 4911486Snikos.nikoleris@arm.com#include "sim/sim_object.hh" 5011486Snikos.nikoleris@arm.com 5112724Snikos.nikoleris@arm.comusing namespace std; 5212724Snikos.nikoleris@arm.comusing namespace AlphaISA; 538232Snate@binkert.org 5412724Snikos.nikoleris@arm.comAlphaConsole::AlphaConsole(Params *p) 5513222Sodanrc@yahoo.com.br : BasicPioDevice(p), disk(p->disk), 5612724Snikos.nikoleris@arm.com console(params()->cons), system(params()->alpha_sys), cpu(params()->cpu) 5711486Snikos.nikoleris@arm.com{ 5812724Snikos.nikoleris@arm.com 5912724Snikos.nikoleris@arm.com pioSize = sizeof(struct AlphaAccess); 6012724Snikos.nikoleris@arm.com 6113352Snikos.nikoleris@arm.com alphaAccess = new Access(); 6212724Snikos.nikoleris@arm.com alphaAccess->last_offset = pioSize - 1; 6312724Snikos.nikoleris@arm.com 6412724Snikos.nikoleris@arm.com alphaAccess->version = ALPHA_ACCESS_VERSION; 6512724Snikos.nikoleris@arm.com alphaAccess->diskUnit = 1; 662810SN/A 672810SN/A alphaAccess->diskCount = 0; 682810SN/A alphaAccess->diskPAddr = 0; 698856Sandreas.hansson@arm.com alphaAccess->diskBlock = 0; 708856Sandreas.hansson@arm.com alphaAccess->diskOperation = 0; 718856Sandreas.hansson@arm.com alphaAccess->outputChar = 0; 7213564Snikos.nikoleris@arm.com alphaAccess->inputChar = 0; 7313564Snikos.nikoleris@arm.com bzero(alphaAccess->cpuStack, sizeof(alphaAccess->cpuStack)); 7412084Sspwilson2@wisc.edu 7512084Sspwilson2@wisc.edu system->setAlphaAccess(pioAddr); 768856Sandreas.hansson@arm.com} 778856Sandreas.hansson@arm.com 784475SN/Avoid 7911053Sandreas.hansson@arm.comAlphaConsole::startup() 805034SN/A{ 8112724Snikos.nikoleris@arm.com alphaAccess->numCPUs = system->getNumCPUs(); 8212724Snikos.nikoleris@arm.com alphaAccess->kernStart = system->getKernelStart(); 8311377Sandreas.hansson@arm.com alphaAccess->kernEnd = system->getKernelEnd(); 8411377Sandreas.hansson@arm.com alphaAccess->entryPoint = system->getKernelEntry(); 8512724Snikos.nikoleris@arm.com alphaAccess->mem_size = system->physmem->size(); 8612724Snikos.nikoleris@arm.com alphaAccess->cpuClock = cpu->frequency() / 1000000; // In MHz 8713352Snikos.nikoleris@arm.com alphaAccess->intrClockFrequency = params()->platform->intrFrequency(); 8812724Snikos.nikoleris@arm.com} 8912724Snikos.nikoleris@arm.com 9012724Snikos.nikoleris@arm.comvoid 9112724Snikos.nikoleris@arm.comAlphaConsole::addressRanges(AddrRangeList &range_list) 9212724Snikos.nikoleris@arm.com{ 9311053Sandreas.hansson@arm.com assert(pioSize != 0); 9411722Ssophiane.senni@gmail.com range_list.clear(); 9511722Ssophiane.senni@gmail.com range_list.push_back(RangeSize(pioAddr, sizeof(struct AlphaAccess))); 9611722Ssophiane.senni@gmail.com} 9711722Ssophiane.senni@gmail.com 989263Smrinmoy.ghosh@arm.com 9913418Sodanrc@yahoo.com.brTick 1005034SN/AAlphaConsole::read(Packet &pkt) 10111331Sandreas.hansson@arm.com{ 10212724Snikos.nikoleris@arm.com 10310884Sandreas.hansson@arm.com /** XXX Do we want to push the addr munging to a bus brige or something? So 1044626SN/A * the device has it's physical address and then the bridge adds on whatever 10510360Sandreas.hansson@arm.com * machine dependent address swizzle is required? 10611484Snikos.nikoleris@arm.com */ 1075034SN/A 1088883SAli.Saidi@ARM.com assert(pkt.result == Unknown); 1098833Sdam.sunwoo@arm.com assert(pkt.addr >= pioAddr && pkt.addr < pioAddr + pioSize); 1104458SN/A 11111377Sandreas.hansson@arm.com pkt.time = curTick + pioDelay; 11211377Sandreas.hansson@arm.com Addr daddr = pkt.addr - pioAddr; 11311377Sandreas.hansson@arm.com 11411377Sandreas.hansson@arm.com uint32_t *data32; 11511377Sandreas.hansson@arm.com uint64_t *data64; 11611377Sandreas.hansson@arm.com 11711331Sandreas.hansson@arm.com switch (pkt.size) 11811331Sandreas.hansson@arm.com { 11912724Snikos.nikoleris@arm.com case sizeof(uint32_t): 12012843Srmk35@cl.cam.ac.uk if (!pkt.data) { 12112724Snikos.nikoleris@arm.com data32 = new uint32_t; 12213419Sodanrc@yahoo.com.br pkt.data = (uint8_t*)data32; 12312724Snikos.nikoleris@arm.com } 12412724Snikos.nikoleris@arm.com else 12512724Snikos.nikoleris@arm.com data32 = (uint32_t*)pkt.data; 12612724Snikos.nikoleris@arm.com 12712724Snikos.nikoleris@arm.com switch (daddr) 12812724Snikos.nikoleris@arm.com { 12912724Snikos.nikoleris@arm.com case offsetof(AlphaAccess, last_offset): 1302810SN/A *data32 = alphaAccess->last_offset; 1312810SN/A break; 1323013SN/A case offsetof(AlphaAccess, version): 1338856Sandreas.hansson@arm.com *data32 = alphaAccess->version; 1342810SN/A break; 1353013SN/A case offsetof(AlphaAccess, numCPUs): 13610714Sandreas.hansson@arm.com *data32 = alphaAccess->numCPUs; 1372810SN/A break; 1389614Srene.dejong@arm.com case offsetof(AlphaAccess, intrClockFrequency): 1399614Srene.dejong@arm.com *data32 = alphaAccess->intrClockFrequency; 1409614Srene.dejong@arm.com break; 14110345SCurtis.Dunham@arm.com default: 14210714Sandreas.hansson@arm.com /* Old console code read in everyting as a 32bit int 14310345SCurtis.Dunham@arm.com * we now break that for better error checking. 1449614Srene.dejong@arm.com */ 1452810SN/A pkt.result = BadAddress; 1462810SN/A } 1472810SN/A DPRINTF(AlphaConsole, "read: offset=%#x val=%#x\n", daddr, *data32); 1488856Sandreas.hansson@arm.com break; 1492810SN/A case sizeof(uint64_t): 1503013SN/A if (!pkt.data) { 15110714Sandreas.hansson@arm.com data64 = new uint64_t; 1523013SN/A pkt.data = (uint8_t*)data64; 1538856Sandreas.hansson@arm.com } 15410714Sandreas.hansson@arm.com else 1558922Swilliam.wang@arm.com data64 = (uint64_t*)pkt.data; 1562897SN/A switch (daddr) 1572810SN/A { 1582810SN/A case offsetof(AlphaAccess, inputChar): 15910344Sandreas.hansson@arm.com *data64 = console->console_in(); 16010344Sandreas.hansson@arm.com break; 16110344Sandreas.hansson@arm.com case offsetof(AlphaAccess, cpuClock): 16210714Sandreas.hansson@arm.com *data64 = alphaAccess->cpuClock; 16310344Sandreas.hansson@arm.com break; 16410344Sandreas.hansson@arm.com case offsetof(AlphaAccess, mem_size): 16510344Sandreas.hansson@arm.com *data64 = alphaAccess->mem_size; 16610713Sandreas.hansson@arm.com break; 16710344Sandreas.hansson@arm.com case offsetof(AlphaAccess, kernStart): 1682844SN/A *data64 = alphaAccess->kernStart; 16912730Sodanrc@yahoo.com.br break; 17012730Sodanrc@yahoo.com.br case offsetof(AlphaAccess, kernEnd): 17112730Sodanrc@yahoo.com.br *data64 = alphaAccess->kernEnd; 17212730Sodanrc@yahoo.com.br break; 17312730Sodanrc@yahoo.com.br case offsetof(AlphaAccess, entryPoint): 17412730Sodanrc@yahoo.com.br *data64 = alphaAccess->entryPoint; 17512730Sodanrc@yahoo.com.br break; 17612730Sodanrc@yahoo.com.br case offsetof(AlphaAccess, diskUnit): 17712730Sodanrc@yahoo.com.br *data64 = alphaAccess->diskUnit; 17812730Sodanrc@yahoo.com.br break; 1792810SN/A case offsetof(AlphaAccess, diskCount): 1802858SN/A *data64 = alphaAccess->diskCount; 1812858SN/A break; 18212724Snikos.nikoleris@arm.com case offsetof(AlphaAccess, diskPAddr): 1838922Swilliam.wang@arm.com *data64 = alphaAccess->diskPAddr; 18412724Snikos.nikoleris@arm.com break; 18512724Snikos.nikoleris@arm.com case offsetof(AlphaAccess, diskBlock): 1862858SN/A *data64 = alphaAccess->diskBlock; 1872858SN/A break; 1889294Sandreas.hansson@arm.com case offsetof(AlphaAccess, diskOperation): 1899294Sandreas.hansson@arm.com *data64 = alphaAccess->diskOperation; 1908922Swilliam.wang@arm.com break; 1918922Swilliam.wang@arm.com case offsetof(AlphaAccess, outputChar): 19212724Snikos.nikoleris@arm.com *data64 = alphaAccess->outputChar; 1938922Swilliam.wang@arm.com break; 1948922Swilliam.wang@arm.com default: 1958922Swilliam.wang@arm.com int cpunum = (daddr - offsetof(AlphaAccess, cpuStack)) / 1968922Swilliam.wang@arm.com sizeof(alphaAccess->cpuStack[0]); 1978922Swilliam.wang@arm.com 1989294Sandreas.hansson@arm.com if (cpunum >= 0 && cpunum < 64) 1999294Sandreas.hansson@arm.com *data64 = alphaAccess->cpuStack[cpunum]; 2008922Swilliam.wang@arm.com else 2018922Swilliam.wang@arm.com panic("Unknown 64bit access, %#x\n", daddr); 20212724Snikos.nikoleris@arm.com } 2038922Swilliam.wang@arm.com DPRINTF(AlphaConsole, "read: offset=%#x val=%#x\n", daddr, *data64); 2048922Swilliam.wang@arm.com break; 2058922Swilliam.wang@arm.com default: 2068922Swilliam.wang@arm.com pkt.result = BadAddress; 2074628SN/A } 20810821Sandreas.hansson@arm.com if (pkt.result == Unknown) pkt.result = Success; 20910821Sandreas.hansson@arm.com return pioDelay; 21010821Sandreas.hansson@arm.com} 21110821Sandreas.hansson@arm.com 21210821Sandreas.hansson@arm.comTick 21310821Sandreas.hansson@arm.comAlphaConsole::write(Packet &pkt) 21410821Sandreas.hansson@arm.com{ 21510821Sandreas.hansson@arm.com pkt.time = curTick + pioDelay; 21610821Sandreas.hansson@arm.com 21710821Sandreas.hansson@arm.com assert(pkt.result == Unknown); 21810821Sandreas.hansson@arm.com assert(pkt.addr >= pioAddr && pkt.addr < pioAddr + pioSize); 2192858SN/A Addr daddr = pkt.addr - pioAddr; 22012724Snikos.nikoleris@arm.com 22112724Snikos.nikoleris@arm.com uint64_t val = *(uint64_t *)pkt.data; 22212724Snikos.nikoleris@arm.com assert(pkt.size == sizeof(uint64_t)); 22312724Snikos.nikoleris@arm.com 22412724Snikos.nikoleris@arm.com switch (daddr) { 22512724Snikos.nikoleris@arm.com case offsetof(AlphaAccess, diskUnit): 22612724Snikos.nikoleris@arm.com alphaAccess->diskUnit = val; 22712724Snikos.nikoleris@arm.com break; 22812724Snikos.nikoleris@arm.com 22912724Snikos.nikoleris@arm.com case offsetof(AlphaAccess, diskCount): 23013418Sodanrc@yahoo.com.br alphaAccess->diskCount = val; 23113418Sodanrc@yahoo.com.br break; 23213564Snikos.nikoleris@arm.com 23312724Snikos.nikoleris@arm.com case offsetof(AlphaAccess, diskPAddr): 23412724Snikos.nikoleris@arm.com alphaAccess->diskPAddr = val; 23512724Snikos.nikoleris@arm.com break; 23612724Snikos.nikoleris@arm.com 23712724Snikos.nikoleris@arm.com case offsetof(AlphaAccess, diskBlock): 23812724Snikos.nikoleris@arm.com alphaAccess->diskBlock = val; 23912724Snikos.nikoleris@arm.com break; 24012724Snikos.nikoleris@arm.com 24112724Snikos.nikoleris@arm.com case offsetof(AlphaAccess, diskOperation): 24212724Snikos.nikoleris@arm.com if (val == 0x13) 24312724Snikos.nikoleris@arm.com disk->read(alphaAccess->diskPAddr, alphaAccess->diskBlock, 24412724Snikos.nikoleris@arm.com alphaAccess->diskCount); 24512724Snikos.nikoleris@arm.com else 24612724Snikos.nikoleris@arm.com panic("Invalid disk operation!"); 24712724Snikos.nikoleris@arm.com 24812724Snikos.nikoleris@arm.com break; 24913352Snikos.nikoleris@arm.com 25013352Snikos.nikoleris@arm.com case offsetof(AlphaAccess, outputChar): 25113352Snikos.nikoleris@arm.com console->out((char)(val & 0xff)); 25213352Snikos.nikoleris@arm.com break; 25313352Snikos.nikoleris@arm.com 25413352Snikos.nikoleris@arm.com default: 25512724Snikos.nikoleris@arm.com int cpunum = (daddr - offsetof(AlphaAccess, cpuStack)) / 25612724Snikos.nikoleris@arm.com sizeof(alphaAccess->cpuStack[0]); 25712724Snikos.nikoleris@arm.com warn("%d: Trying to launch CPU number %d!", curTick, cpunum); 25812724Snikos.nikoleris@arm.com assert(val > 0 && "Must not access primary cpu"); 25912724Snikos.nikoleris@arm.com if (cpunum >= 0 && cpunum < 64) 26012724Snikos.nikoleris@arm.com alphaAccess->cpuStack[cpunum] = val; 26112724Snikos.nikoleris@arm.com else 26212724Snikos.nikoleris@arm.com panic("Unknown 64bit access, %#x\n", daddr); 26312724Snikos.nikoleris@arm.com } 26412724Snikos.nikoleris@arm.com 26512724Snikos.nikoleris@arm.com pkt.result = Success; 26612724Snikos.nikoleris@arm.com 26712724Snikos.nikoleris@arm.com return pioDelay; 26812724Snikos.nikoleris@arm.com} 26912724Snikos.nikoleris@arm.com 27012724Snikos.nikoleris@arm.comvoid 27112724Snikos.nikoleris@arm.comAlphaConsole::Access::serialize(ostream &os) 27212724Snikos.nikoleris@arm.com{ 27312724Snikos.nikoleris@arm.com SERIALIZE_SCALAR(last_offset); 27412724Snikos.nikoleris@arm.com SERIALIZE_SCALAR(version); 27512724Snikos.nikoleris@arm.com SERIALIZE_SCALAR(numCPUs); 27612724Snikos.nikoleris@arm.com SERIALIZE_SCALAR(mem_size); 27712724Snikos.nikoleris@arm.com SERIALIZE_SCALAR(cpuClock); 27812724Snikos.nikoleris@arm.com SERIALIZE_SCALAR(intrClockFrequency); 27912724Snikos.nikoleris@arm.com SERIALIZE_SCALAR(kernStart); 28012724Snikos.nikoleris@arm.com SERIALIZE_SCALAR(kernEnd); 28112724Snikos.nikoleris@arm.com SERIALIZE_SCALAR(entryPoint); 28212724Snikos.nikoleris@arm.com SERIALIZE_SCALAR(diskUnit); 28312724Snikos.nikoleris@arm.com SERIALIZE_SCALAR(diskCount); 28412724Snikos.nikoleris@arm.com SERIALIZE_SCALAR(diskPAddr); 28512724Snikos.nikoleris@arm.com SERIALIZE_SCALAR(diskBlock); 28612724Snikos.nikoleris@arm.com SERIALIZE_SCALAR(diskOperation); 28712724Snikos.nikoleris@arm.com SERIALIZE_SCALAR(outputChar); 28812724Snikos.nikoleris@arm.com SERIALIZE_SCALAR(inputChar); 28912724Snikos.nikoleris@arm.com SERIALIZE_ARRAY(cpuStack,64); 29012724Snikos.nikoleris@arm.com} 29112724Snikos.nikoleris@arm.com 29212724Snikos.nikoleris@arm.comvoid 29312724Snikos.nikoleris@arm.comAlphaConsole::Access::unserialize(Checkpoint *cp, const std::string §ion) 29412724Snikos.nikoleris@arm.com{ 29512724Snikos.nikoleris@arm.com UNSERIALIZE_SCALAR(last_offset); 29612724Snikos.nikoleris@arm.com UNSERIALIZE_SCALAR(version); 29712724Snikos.nikoleris@arm.com UNSERIALIZE_SCALAR(numCPUs); 29812724Snikos.nikoleris@arm.com UNSERIALIZE_SCALAR(mem_size); 29912724Snikos.nikoleris@arm.com UNSERIALIZE_SCALAR(cpuClock); 30012724Snikos.nikoleris@arm.com UNSERIALIZE_SCALAR(intrClockFrequency); 30112724Snikos.nikoleris@arm.com UNSERIALIZE_SCALAR(kernStart); 30212724Snikos.nikoleris@arm.com UNSERIALIZE_SCALAR(kernEnd); 30312724Snikos.nikoleris@arm.com UNSERIALIZE_SCALAR(entryPoint); 30412724Snikos.nikoleris@arm.com UNSERIALIZE_SCALAR(diskUnit); 30512724Snikos.nikoleris@arm.com UNSERIALIZE_SCALAR(diskCount); 30612724Snikos.nikoleris@arm.com UNSERIALIZE_SCALAR(diskPAddr); 30712724Snikos.nikoleris@arm.com UNSERIALIZE_SCALAR(diskBlock); 30812724Snikos.nikoleris@arm.com UNSERIALIZE_SCALAR(diskOperation); 30912724Snikos.nikoleris@arm.com UNSERIALIZE_SCALAR(outputChar); 31012724Snikos.nikoleris@arm.com UNSERIALIZE_SCALAR(inputChar); 31112724Snikos.nikoleris@arm.com UNSERIALIZE_ARRAY(cpuStack, 64); 31212724Snikos.nikoleris@arm.com} 31312724Snikos.nikoleris@arm.com 31412724Snikos.nikoleris@arm.comvoid 31512724Snikos.nikoleris@arm.comAlphaConsole::serialize(ostream &os) 31612724Snikos.nikoleris@arm.com{ 31712724Snikos.nikoleris@arm.com alphaAccess->serialize(os); 31812724Snikos.nikoleris@arm.com} 31912724Snikos.nikoleris@arm.com 32012724Snikos.nikoleris@arm.comvoid 32112724Snikos.nikoleris@arm.comAlphaConsole::unserialize(Checkpoint *cp, const std::string §ion) 32212724Snikos.nikoleris@arm.com{ 32312724Snikos.nikoleris@arm.com alphaAccess->unserialize(cp, section); 32412724Snikos.nikoleris@arm.com} 32512724Snikos.nikoleris@arm.com 32612724Snikos.nikoleris@arm.comBEGIN_DECLARE_SIM_OBJECT_PARAMS(AlphaConsole) 32712724Snikos.nikoleris@arm.com 32812724Snikos.nikoleris@arm.com SimObjectParam<SimConsole *> sim_console; 32912724Snikos.nikoleris@arm.com SimObjectParam<SimpleDisk *> disk; 33012724Snikos.nikoleris@arm.com Param<Addr> addr; 33112724Snikos.nikoleris@arm.com SimObjectParam<AlphaSystem *> system; 33212724Snikos.nikoleris@arm.com SimObjectParam<BaseCPU *> cpu; 33312724Snikos.nikoleris@arm.com SimObjectParam<Platform *> platform; 33412724Snikos.nikoleris@arm.com Param<Tick> pio_latency; 33512724Snikos.nikoleris@arm.com 33612724Snikos.nikoleris@arm.comEND_DECLARE_SIM_OBJECT_PARAMS(AlphaConsole) 33712724Snikos.nikoleris@arm.com 33812724Snikos.nikoleris@arm.comBEGIN_INIT_SIM_OBJECT_PARAMS(AlphaConsole) 33912724Snikos.nikoleris@arm.com 34012724Snikos.nikoleris@arm.com INIT_PARAM(sim_console, "The Simulator Console"), 34112724Snikos.nikoleris@arm.com INIT_PARAM(disk, "Simple Disk"), 34212724Snikos.nikoleris@arm.com INIT_PARAM(addr, "Device Address"), 34312724Snikos.nikoleris@arm.com INIT_PARAM(system, "system object"), 34412724Snikos.nikoleris@arm.com INIT_PARAM(cpu, "Processor"), 34512724Snikos.nikoleris@arm.com INIT_PARAM(platform, "platform"), 34612724Snikos.nikoleris@arm.com INIT_PARAM_DFLT(pio_latency, "Programmed IO latency", 1000) 34713418Sodanrc@yahoo.com.br 34812724Snikos.nikoleris@arm.comEND_INIT_SIM_OBJECT_PARAMS(AlphaConsole) 34912724Snikos.nikoleris@arm.com 35012724Snikos.nikoleris@arm.comCREATE_SIM_OBJECT(AlphaConsole) 35112724Snikos.nikoleris@arm.com{ 35212724Snikos.nikoleris@arm.com AlphaConsole::Params *p = new AlphaConsole::Params; 35313418Sodanrc@yahoo.com.br p->name = getInstanceName(); 35412724Snikos.nikoleris@arm.com p->platform = platform; 35512724Snikos.nikoleris@arm.com p->pio_addr = addr; 35612724Snikos.nikoleris@arm.com p->pio_delay = pio_latency; 35712820Srmk35@cl.cam.ac.uk p->cons = sim_console; 35812724Snikos.nikoleris@arm.com p->disk = disk; 35912724Snikos.nikoleris@arm.com p->alpha_sys = system; 36012724Snikos.nikoleris@arm.com p->system = system; 36112724Snikos.nikoleris@arm.com p->cpu = cpu; 36212724Snikos.nikoleris@arm.com return new AlphaConsole(p); 36313418Sodanrc@yahoo.com.br} 36412724Snikos.nikoleris@arm.com 36512724Snikos.nikoleris@arm.comREGISTER_SIM_OBJECT("AlphaConsole", AlphaConsole) 36612724Snikos.nikoleris@arm.com