Tsunami.py revision 2916 
15882Snate@binkert.orgfrom m5.config import *
25882Snate@binkert.orgfrom Device import BasicPioDevice
35882Snate@binkert.orgfrom Platform import Platform
45882Snate@binkert.orgfrom AlphaConsole import AlphaConsole
55882Snate@binkert.orgfrom Uart import Uart8250
65882Snate@binkert.orgfrom Pci import PciConfigAll
75882Snate@binkert.orgfrom BadDevice import BadDevice
85882Snate@binkert.org
95882Snate@binkert.orgclass TsunamiCChip(BasicPioDevice):
105882Snate@binkert.org    type = 'TsunamiCChip'
115882Snate@binkert.org    tsunami = Param.Tsunami(Parent.any, "Tsunami")
125882Snate@binkert.org
135882Snate@binkert.orgclass IsaFake(BasicPioDevice):
145882Snate@binkert.org    type = 'IsaFake'
155882Snate@binkert.org    pio_size = Param.Addr(0x8, "Size of address range")
165882Snate@binkert.org
175882Snate@binkert.orgclass TsunamiIO(BasicPioDevice):
185882Snate@binkert.org    type = 'TsunamiIO'
195882Snate@binkert.org    time = Param.UInt64(1136073600,
205882Snate@binkert.org        "System time to use (0 for actual time, default is 1/1/06)")
215882Snate@binkert.org    tsunami = Param.Tsunami(Parent.any, "Tsunami")
225882Snate@binkert.org    frequency = Param.Frequency('1024Hz', "frequency of interrupts")
235882Snate@binkert.org
245882Snate@binkert.orgclass TsunamiPChip(BasicPioDevice):
255882Snate@binkert.org    type = 'TsunamiPChip'
265882Snate@binkert.org    tsunami = Param.Tsunami(Parent.any, "Tsunami")
275882Snate@binkert.org
285882Snate@binkert.orgclass Tsunami(Platform):
295882Snate@binkert.org    type = 'Tsunami'
305882Snate@binkert.org    system = Param.System(Parent.any, "system")
315882Snate@binkert.org
325882Snate@binkert.org    cchip = TsunamiCChip(pio_addr=0x801a0000000)
335882Snate@binkert.org    pchip = TsunamiPChip(pio_addr=0x80180000000)
348229Snate@binkert.org    pciconfig = PciConfigAll()
358229Snate@binkert.org    fake_sm_chip = IsaFake(pio_addr=0x801fc000370)
365882Snate@binkert.org
375882Snate@binkert.org    fake_uart1 = IsaFake(pio_addr=0x801fc0002f8)
385882Snate@binkert.org    fake_uart2 = IsaFake(pio_addr=0x801fc0003e8)
395882Snate@binkert.org    fake_uart3 = IsaFake(pio_addr=0x801fc0002e8)
405882Snate@binkert.org    fake_uart4 = IsaFake(pio_addr=0x801fc0003f0)
415882Snate@binkert.org
425882Snate@binkert.org    fake_ppc = IsaFake(pio_addr=0x801fc0003bc)
435882Snate@binkert.org
445882Snate@binkert.org    fake_OROM = IsaFake(pio_addr=0x800000a0000, pio_size=0x60000)
455882Snate@binkert.org
465882Snate@binkert.org    fake_pnp_addr = IsaFake(pio_addr=0x801fc000279)
47    fake_pnp_write = IsaFake(pio_addr=0x801fc000a79)
48    fake_pnp_read0 = IsaFake(pio_addr=0x801fc000203)
49    fake_pnp_read1 = IsaFake(pio_addr=0x801fc000243)
50    fake_pnp_read2 = IsaFake(pio_addr=0x801fc000283)
51    fake_pnp_read3 = IsaFake(pio_addr=0x801fc0002c3)
52    fake_pnp_read4 = IsaFake(pio_addr=0x801fc000303)
53    fake_pnp_read5 = IsaFake(pio_addr=0x801fc000343)
54    fake_pnp_read6 = IsaFake(pio_addr=0x801fc000383)
55    fake_pnp_read7 = IsaFake(pio_addr=0x801fc0003c3)
56
57    fake_ata0 = IsaFake(pio_addr=0x801fc0001f0)
58    fake_ata1 = IsaFake(pio_addr=0x801fc000170)
59
60    fb = BadDevice(pio_addr=0x801fc0003d0, devicename='FrameBuffer')
61    io = TsunamiIO(pio_addr=0x801fc000000)
62    uart = Uart8250(pio_addr=0x801fc0003f8)
63    console = AlphaConsole(pio_addr=0x80200000000, disk=Parent.simple_disk)
64
65    # Attach I/O devices to specified bus object.  Can't do this
66    # earlier, since the bus object itself is typically defined at the
67    # System level.
68    def attachIO(self, bus):
69        self.cchip.pio = bus.port
70        self.pchip.pio = bus.port
71        self.pciconfig.pio = bus.default
72        self.fake_sm_chip.pio = bus.port
73        self.fake_uart1.pio = bus.port
74        self.fake_uart2.pio = bus.port
75        self.fake_uart3.pio = bus.port
76        self.fake_uart4.pio = bus.port
77        self.fake_ppc.pio = bus.port
78        self.fake_OROM.pio = bus.port
79        self.fake_pnp_addr.pio = bus.port
80        self.fake_pnp_write.pio = bus.port
81        self.fake_pnp_read0.pio = bus.port
82        self.fake_pnp_read1.pio = bus.port
83        self.fake_pnp_read2.pio = bus.port
84        self.fake_pnp_read3.pio = bus.port
85        self.fake_pnp_read4.pio = bus.port
86        self.fake_pnp_read5.pio = bus.port
87        self.fake_pnp_read6.pio = bus.port
88        self.fake_pnp_read7.pio = bus.port
89        self.fake_ata0.pio = bus.port
90        self.fake_ata1.pio = bus.port
91        self.fb.pio = bus.port
92        self.io.pio = bus.port
93        self.uart.pio = bus.port
94        self.console.pio = bus.port
95