SConscript revision 9850:87d6b41749e9
14202Sbinkertn@umich.edu# -*- mode:python -*-
24202Sbinkertn@umich.edu
34202Sbinkertn@umich.edu# Copyright (c) 2006 The Regents of The University of Michigan
44202Sbinkertn@umich.edu# All rights reserved.
54202Sbinkertn@umich.edu#
64202Sbinkertn@umich.edu# Redistribution and use in source and binary forms, with or without
74202Sbinkertn@umich.edu# modification, are permitted provided that the following conditions are
84202Sbinkertn@umich.edu# met: redistributions of source code must retain the above copyright
94202Sbinkertn@umich.edu# notice, this list of conditions and the following disclaimer;
104202Sbinkertn@umich.edu# redistributions in binary form must reproduce the above copyright
114202Sbinkertn@umich.edu# notice, this list of conditions and the following disclaimer in the
124202Sbinkertn@umich.edu# documentation and/or other materials provided with the distribution;
134202Sbinkertn@umich.edu# neither the name of the copyright holders nor the names of its
144202Sbinkertn@umich.edu# contributors may be used to endorse or promote products derived from
154202Sbinkertn@umich.edu# this software without specific prior written permission.
164202Sbinkertn@umich.edu#
174202Sbinkertn@umich.edu# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
184202Sbinkertn@umich.edu# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
194202Sbinkertn@umich.edu# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
204202Sbinkertn@umich.edu# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
214202Sbinkertn@umich.edu# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
224202Sbinkertn@umich.edu# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
234202Sbinkertn@umich.edu# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
244202Sbinkertn@umich.edu# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
254202Sbinkertn@umich.edu# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
264202Sbinkertn@umich.edu# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
274202Sbinkertn@umich.edu# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
284202Sbinkertn@umich.edu#
294202Sbinkertn@umich.edu# Authors: Steve Reinhardt
304202Sbinkertn@umich.edu#          Gabe Black
314202Sbinkertn@umich.edu
324202Sbinkertn@umich.eduImport('*')
334486Sbinkertn@umich.edu
344486Sbinkertn@umich.eduif env['TARGET_ISA'] == 'null':
354486Sbinkertn@umich.edu    Return()
364486Sbinkertn@umich.edu
374486Sbinkertn@umich.eduSimObject('BadDevice.py')
384202Sbinkertn@umich.eduSimObject('CopyEngine.py')
394202Sbinkertn@umich.eduSimObject('Device.py')
404202Sbinkertn@umich.eduSimObject('DiskImage.py')
414202Sbinkertn@umich.eduSimObject('Ethernet.py')
424202Sbinkertn@umich.eduSimObject('Ide.py')
434202Sbinkertn@umich.eduSimObject('Pci.py')
444202Sbinkertn@umich.eduSimObject('Platform.py')
454202Sbinkertn@umich.eduSimObject('SimpleDisk.py')
464202Sbinkertn@umich.eduSimObject('Terminal.py')
474202Sbinkertn@umich.eduSimObject('Uart.py')
484202Sbinkertn@umich.edu
494202Sbinkertn@umich.eduSource('baddev.cc')
504202Sbinkertn@umich.eduSource('copy_engine.cc')
514202Sbinkertn@umich.eduSource('disk_image.cc')
525192Ssaidi@eecs.umich.eduSource('dma_device.cc')
535192Ssaidi@eecs.umich.eduSource('etherbus.cc')
545192Ssaidi@eecs.umich.eduSource('etherdevice.cc')
555192Ssaidi@eecs.umich.eduSource('etherdump.cc')
565192Ssaidi@eecs.umich.eduSource('etherint.cc')
575192Ssaidi@eecs.umich.eduSource('etherlink.cc')
585192Ssaidi@eecs.umich.eduSource('etherpkt.cc')
59Source('ethertap.cc')
60Source('i8254xGBe.cc')
61Source('ide_ctrl.cc')
62Source('ide_disk.cc')
63Source('intel_8254_timer.cc')
64Source('io_device.cc')
65Source('isa_fake.cc')
66Source('mc146818.cc')
67Source('ns_gige.cc')
68Source('pciconfigall.cc')
69Source('pcidev.cc')
70Source('pktfifo.cc')
71Source('platform.cc')
72Source('ps2.cc')
73Source('simple_disk.cc')
74Source('sinic.cc')
75Source('terminal.cc')
76Source('uart.cc')
77Source('uart8250.cc')
78
79DebugFlag('DiskImageRead')
80DebugFlag('DiskImageWrite')
81DebugFlag('DMA')
82DebugFlag('DMACopyEngine')
83DebugFlag('Ethernet')
84DebugFlag('EthernetCksum')
85DebugFlag('EthernetDMA')
86DebugFlag('EthernetData')
87DebugFlag('EthernetDesc')
88DebugFlag('EthernetEEPROM')
89DebugFlag('EthernetIntr')
90DebugFlag('EthernetPIO')
91DebugFlag('EthernetSM')
92DebugFlag('IdeCtrl')
93DebugFlag('IdeDisk')
94DebugFlag('Intel8254Timer')
95DebugFlag('IsaFake')
96DebugFlag('MC146818')
97DebugFlag('PCIDEV')
98DebugFlag('PciConfigAll')
99DebugFlag('SimpleDisk')
100DebugFlag('SimpleDiskData')
101DebugFlag('Terminal')
102DebugFlag('TerminalVerbose')
103DebugFlag('Uart')
104
105CompoundFlag('DiskImageAll', [ 'DiskImageRead', 'DiskImageWrite' ])
106CompoundFlag('EthernetAll', [ 'Ethernet', 'EthernetPIO', 'EthernetDMA',
107    'EthernetData' , 'EthernetDesc', 'EthernetIntr', 'EthernetSM',
108    'EthernetCksum', 'EthernetEEPROM' ])
109CompoundFlag('EthernetNoData', [ 'Ethernet', 'EthernetPIO', 'EthernetDesc',
110    'EthernetIntr', 'EthernetSM', 'EthernetCksum' ])
111CompoundFlag('IdeAll', [ 'IdeCtrl', 'IdeDisk' ])
112