thread_state.hh revision 8229
12330SN/A/*
22330SN/A * Copyright (c) 2006 The Regents of The University of Michigan
32330SN/A * All rights reserved.
42330SN/A *
52330SN/A * Redistribution and use in source and binary forms, with or without
62330SN/A * modification, are permitted provided that the following conditions are
72330SN/A * met: redistributions of source code must retain the above copyright
82330SN/A * notice, this list of conditions and the following disclaimer;
92330SN/A * redistributions in binary form must reproduce the above copyright
102330SN/A * notice, this list of conditions and the following disclaimer in the
112330SN/A * documentation and/or other materials provided with the distribution;
122330SN/A * neither the name of the copyright holders nor the names of its
132330SN/A * contributors may be used to endorse or promote products derived from
142330SN/A * this software without specific prior written permission.
152330SN/A *
162330SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
172330SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
182330SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
192330SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
202330SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
212330SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
222330SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
232330SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
242330SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
252330SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
262330SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272689Sktlim@umich.edu *
282689Sktlim@umich.edu * Authors: Kevin Lim
292330SN/A */
302292SN/A
312292SN/A#ifndef __CPU_THREAD_STATE_HH__
322292SN/A#define __CPU_THREAD_STATE_HH__
332292SN/A
342980Sgblack@eecs.umich.edu#include "arch/types.hh"
356658Snate@binkert.org#include "config/the_isa.hh"
368229Snate@binkert.org#include "cpu/base.hh"
372362SN/A#include "cpu/profile.hh"
382680Sktlim@umich.edu#include "cpu/thread_context.hh"
392292SN/A
402678Sktlim@umich.edu#if !FULL_SYSTEM
412683Sktlim@umich.edu#include "mem/mem_object.hh"
422683Sktlim@umich.edu#include "sim/process.hh"
432678Sktlim@umich.edu#endif
442678Sktlim@umich.edu
452292SN/A#if FULL_SYSTEM
462292SN/Aclass EndQuiesceEvent;
472292SN/Aclass FunctionProfile;
482292SN/Aclass ProfileNode;
493548Sgblack@eecs.umich.edunamespace TheISA {
503548Sgblack@eecs.umich.edu    namespace Kernel {
513548Sgblack@eecs.umich.edu        class Statistics;
523548Sgblack@eecs.umich.edu    };
532330SN/A};
542292SN/A#endif
552292SN/A
562862Sktlim@umich.educlass Checkpoint;
573486Sktlim@umich.educlass Port;
583402Sktlim@umich.educlass TranslatingPort;
592862Sktlim@umich.edu
602330SN/A/**
612330SN/A *  Struct for holding general thread state that is needed across CPU
622330SN/A *  models.  This includes things such as pointers to the process,
632330SN/A *  memory, quiesce events, and certain stats.  This can be expanded
642330SN/A *  to hold more thread-specific stats within it.
652330SN/A */
662292SN/Astruct ThreadState {
672683Sktlim@umich.edu    typedef ThreadContext::Status Status;
682683Sktlim@umich.edu
692292SN/A#if FULL_SYSTEM
706221Snate@binkert.org    ThreadState(BaseCPU *cpu, ThreadID _tid);
712292SN/A#else
726331Sgblack@eecs.umich.edu    ThreadState(BaseCPU *cpu, ThreadID _tid, Process *_process);
732292SN/A#endif
742683Sktlim@umich.edu
753486Sktlim@umich.edu    ~ThreadState();
763486Sktlim@umich.edu
772862Sktlim@umich.edu    void serialize(std::ostream &os);
782862Sktlim@umich.edu
792862Sktlim@umich.edu    void unserialize(Checkpoint *cp, const std::string &section);
802862Sktlim@umich.edu
815712Shsul@eecs.umich.edu    int cpuId() { return baseCpu->cpuId(); }
822683Sktlim@umich.edu
835714Shsul@eecs.umich.edu    int contextId() { return _contextId; }
845714Shsul@eecs.umich.edu
855714Shsul@eecs.umich.edu    void setContextId(int id) { _contextId = id; }
865714Shsul@eecs.umich.edu
876221Snate@binkert.org    void setThreadId(ThreadID id) { _threadId = id; }
882683Sktlim@umich.edu
896221Snate@binkert.org    ThreadID threadId() { return _threadId; }
902683Sktlim@umich.edu
912683Sktlim@umich.edu    Tick readLastActivate() { return lastActivate; }
922683Sktlim@umich.edu
932683Sktlim@umich.edu    Tick readLastSuspend() { return lastSuspend; }
942683Sktlim@umich.edu
952683Sktlim@umich.edu#if FULL_SYSTEM
965497Ssaidi@eecs.umich.edu    void connectMemPorts(ThreadContext *tc);
973675Sktlim@umich.edu
983686Sktlim@umich.edu    void connectPhysPort();
993675Sktlim@umich.edu
1005497Ssaidi@eecs.umich.edu    void connectVirtPort(ThreadContext *tc);
1013675Sktlim@umich.edu
1022683Sktlim@umich.edu    void dumpFuncProfile();
1032683Sktlim@umich.edu
1042683Sktlim@umich.edu    EndQuiesceEvent *getQuiesceEvent() { return quiesceEvent; }
1052683Sktlim@umich.edu
1062683Sktlim@umich.edu    void profileClear();
1072683Sktlim@umich.edu
1082683Sktlim@umich.edu    void profileSample();
1092683Sktlim@umich.edu
1103548Sgblack@eecs.umich.edu    TheISA::Kernel::Statistics *getKernelStats() { return kernelStats; }
1112683Sktlim@umich.edu
1122690Sktlim@umich.edu    FunctionalPort *getPhysPort() { return physPort; }
1132690Sktlim@umich.edu
1142683Sktlim@umich.edu    void setPhysPort(FunctionalPort *port) { physPort = port; }
1152683Sktlim@umich.edu
1165499Ssaidi@eecs.umich.edu    VirtualPort *getVirtPort() { return virtPort; }
1172683Sktlim@umich.edu#else
1182683Sktlim@umich.edu    Process *getProcessPtr() { return process; }
1192683Sktlim@umich.edu
1203402Sktlim@umich.edu    TranslatingPort *getMemPort();
1212683Sktlim@umich.edu
1222683Sktlim@umich.edu    void setMemPort(TranslatingPort *_port) { port = _port; }
1232678Sktlim@umich.edu#endif
1242292SN/A
1252683Sktlim@umich.edu    /** Reads the number of instructions functionally executed and
1262683Sktlim@umich.edu     * committed.
1272683Sktlim@umich.edu     */
1282683Sktlim@umich.edu    Counter readFuncExeInst() { return funcExeInst; }
1292683Sktlim@umich.edu
1302683Sktlim@umich.edu    /** Sets the total number of instructions functionally executed
1312683Sktlim@umich.edu     * and committed.
1322683Sktlim@umich.edu     */
1332683Sktlim@umich.edu    void setFuncExeInst(Counter new_val) { funcExeInst = new_val; }
1342683Sktlim@umich.edu
1352683Sktlim@umich.edu    /** Returns the status of this thread. */
1362683Sktlim@umich.edu    Status status() const { return _status; }
1372683Sktlim@umich.edu
1382683Sktlim@umich.edu    /** Sets the status of this thread. */
1392683Sktlim@umich.edu    void setStatus(Status new_status) { _status = new_status; }
1402683Sktlim@umich.edu
1413673Srdreslin@umich.edu  public:
1423675Sktlim@umich.edu    /** Connects port to the functional port of the memory object
1433675Sktlim@umich.edu     * below the CPU. */
1443675Sktlim@umich.edu    void connectToMemFunc(Port *port);
1453486Sktlim@umich.edu
1462683Sktlim@umich.edu    /** Number of instructions committed. */
1472683Sktlim@umich.edu    Counter numInst;
1482683Sktlim@umich.edu    /** Stat for number instructions committed. */
1495999Snate@binkert.org    Stats::Scalar numInsts;
1502683Sktlim@umich.edu    /** Stat for number of memory references. */
1515999Snate@binkert.org    Stats::Scalar numMemRefs;
1522683Sktlim@umich.edu
1532683Sktlim@umich.edu    /** Number of simulated loads, used for tracking events based on
1542683Sktlim@umich.edu     * the number of loads committed.
1552683Sktlim@umich.edu     */
1562683Sktlim@umich.edu    Counter numLoad;
1572683Sktlim@umich.edu
1582683Sktlim@umich.edu    /** The number of simulated loads committed prior to this run. */
1592683Sktlim@umich.edu    Counter startNumLoad;
1602683Sktlim@umich.edu
1612683Sktlim@umich.edu  protected:
1622683Sktlim@umich.edu    ThreadContext::Status _status;
1632683Sktlim@umich.edu
1643402Sktlim@umich.edu    // Pointer to the base CPU.
1653402Sktlim@umich.edu    BaseCPU *baseCpu;
1663402Sktlim@umich.edu
1675714Shsul@eecs.umich.edu    // system wide HW context id
1685714Shsul@eecs.umich.edu    int _contextId;
1695714Shsul@eecs.umich.edu
1702292SN/A    // Index of hardware thread context on the CPU that this represents.
1716221Snate@binkert.org    ThreadID _threadId;
1722292SN/A
1732690Sktlim@umich.edu  public:
1742683Sktlim@umich.edu    /** Last time activate was called on this thread. */
1752683Sktlim@umich.edu    Tick lastActivate;
1762292SN/A
1772683Sktlim@umich.edu    /** Last time suspend was called on this thread. */
1782683Sktlim@umich.edu    Tick lastSuspend;
1792292SN/A
1802292SN/A#if FULL_SYSTEM
1812683Sktlim@umich.edu  public:
1822292SN/A    FunctionProfile *profile;
1832292SN/A    ProfileNode *profileNode;
1842292SN/A    Addr profilePC;
1852292SN/A    EndQuiesceEvent *quiesceEvent;
1862292SN/A
1873548Sgblack@eecs.umich.edu    TheISA::Kernel::Statistics *kernelStats;
1882683Sktlim@umich.edu  protected:
1892683Sktlim@umich.edu    /** A functional port outgoing only for functional accesses to physical
1902683Sktlim@umich.edu     * addresses.*/
1912683Sktlim@umich.edu    FunctionalPort *physPort;
1922683Sktlim@umich.edu
1932683Sktlim@umich.edu    /** A functional port, outgoing only, for functional accesse to virtual
1945497Ssaidi@eecs.umich.edu     * addresses. */
1952683Sktlim@umich.edu    VirtualPort *virtPort;
1962292SN/A#else
1972678Sktlim@umich.edu    TranslatingPort *port;
1982678Sktlim@umich.edu
1992292SN/A    Process *process;
2002330SN/A#endif
2012330SN/A
2022690Sktlim@umich.edu  public:
2032292SN/A    /*
2042292SN/A     * number of executed instructions, for matching with syscall trace
2052292SN/A     * points in EIO files.
2062292SN/A     */
2072292SN/A    Counter funcExeInst;
2082292SN/A
2092292SN/A    //
2102292SN/A    // Count failed store conditionals so we can warn of apparent
2112292SN/A    // application deadlock situations.
2122292SN/A    unsigned storeCondFailures;
2132292SN/A};
2142292SN/A
2152292SN/A#endif // __CPU_THREAD_STATE_HH__
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