thread_state.hh revision 8229
110259SAndrew.Bardsley@arm.com/*
210259SAndrew.Bardsley@arm.com * Copyright (c) 2006 The Regents of The University of Michigan
310259SAndrew.Bardsley@arm.com * All rights reserved.
410259SAndrew.Bardsley@arm.com *
510259SAndrew.Bardsley@arm.com * Redistribution and use in source and binary forms, with or without
610259SAndrew.Bardsley@arm.com * modification, are permitted provided that the following conditions are
710259SAndrew.Bardsley@arm.com * met: redistributions of source code must retain the above copyright
810259SAndrew.Bardsley@arm.com * notice, this list of conditions and the following disclaimer;
910259SAndrew.Bardsley@arm.com * redistributions in binary form must reproduce the above copyright
1010259SAndrew.Bardsley@arm.com * notice, this list of conditions and the following disclaimer in the
1110259SAndrew.Bardsley@arm.com * documentation and/or other materials provided with the distribution;
1210259SAndrew.Bardsley@arm.com * neither the name of the copyright holders nor the names of its
1310259SAndrew.Bardsley@arm.com * contributors may be used to endorse or promote products derived from
1410259SAndrew.Bardsley@arm.com * this software without specific prior written permission.
1510259SAndrew.Bardsley@arm.com *
1610259SAndrew.Bardsley@arm.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
1710259SAndrew.Bardsley@arm.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
1810259SAndrew.Bardsley@arm.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
1910259SAndrew.Bardsley@arm.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
2010259SAndrew.Bardsley@arm.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
2110259SAndrew.Bardsley@arm.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
2210259SAndrew.Bardsley@arm.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
2310259SAndrew.Bardsley@arm.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
2410259SAndrew.Bardsley@arm.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
2510259SAndrew.Bardsley@arm.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
2610259SAndrew.Bardsley@arm.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2710259SAndrew.Bardsley@arm.com *
2810259SAndrew.Bardsley@arm.com * Authors: Kevin Lim
2910259SAndrew.Bardsley@arm.com */
3010259SAndrew.Bardsley@arm.com
3110259SAndrew.Bardsley@arm.com#ifndef __CPU_THREAD_STATE_HH__
3210259SAndrew.Bardsley@arm.com#define __CPU_THREAD_STATE_HH__
3310259SAndrew.Bardsley@arm.com
3410259SAndrew.Bardsley@arm.com#include "arch/types.hh"
3510259SAndrew.Bardsley@arm.com#include "config/the_isa.hh"
3610259SAndrew.Bardsley@arm.com#include "cpu/base.hh"
3710259SAndrew.Bardsley@arm.com#include "cpu/profile.hh"
3810259SAndrew.Bardsley@arm.com#include "cpu/thread_context.hh"
3910259SAndrew.Bardsley@arm.com
4010259SAndrew.Bardsley@arm.com#if !FULL_SYSTEM
4110259SAndrew.Bardsley@arm.com#include "mem/mem_object.hh"
4210259SAndrew.Bardsley@arm.com#include "sim/process.hh"
4310259SAndrew.Bardsley@arm.com#endif
4410259SAndrew.Bardsley@arm.com
4510259SAndrew.Bardsley@arm.com#if FULL_SYSTEM
4610259SAndrew.Bardsley@arm.comclass EndQuiesceEvent;
4710259SAndrew.Bardsley@arm.comclass FunctionProfile;
4810259SAndrew.Bardsley@arm.comclass ProfileNode;
4910259SAndrew.Bardsley@arm.comnamespace TheISA {
5010913Sandreas.sandberg@arm.com    namespace Kernel {
5110259SAndrew.Bardsley@arm.com        class Statistics;
5210259SAndrew.Bardsley@arm.com    };
5310259SAndrew.Bardsley@arm.com};
5410259SAndrew.Bardsley@arm.com#endif
5510259SAndrew.Bardsley@arm.com
5610259SAndrew.Bardsley@arm.comclass Checkpoint;
5710259SAndrew.Bardsley@arm.comclass Port;
5810259SAndrew.Bardsley@arm.comclass TranslatingPort;
5910259SAndrew.Bardsley@arm.com
6010259SAndrew.Bardsley@arm.com/**
6110259SAndrew.Bardsley@arm.com *  Struct for holding general thread state that is needed across CPU
6210259SAndrew.Bardsley@arm.com *  models.  This includes things such as pointers to the process,
6310259SAndrew.Bardsley@arm.com *  memory, quiesce events, and certain stats.  This can be expanded
6410259SAndrew.Bardsley@arm.com *  to hold more thread-specific stats within it.
6510259SAndrew.Bardsley@arm.com */
6610259SAndrew.Bardsley@arm.comstruct ThreadState {
6710259SAndrew.Bardsley@arm.com    typedef ThreadContext::Status Status;
6810259SAndrew.Bardsley@arm.com
6910259SAndrew.Bardsley@arm.com#if FULL_SYSTEM
7010259SAndrew.Bardsley@arm.com    ThreadState(BaseCPU *cpu, ThreadID _tid);
7110259SAndrew.Bardsley@arm.com#else
7210259SAndrew.Bardsley@arm.com    ThreadState(BaseCPU *cpu, ThreadID _tid, Process *_process);
7310259SAndrew.Bardsley@arm.com#endif
7410259SAndrew.Bardsley@arm.com
7510259SAndrew.Bardsley@arm.com    ~ThreadState();
7610259SAndrew.Bardsley@arm.com
7710259SAndrew.Bardsley@arm.com    void serialize(std::ostream &os);
7810259SAndrew.Bardsley@arm.com
7910259SAndrew.Bardsley@arm.com    void unserialize(Checkpoint *cp, const std::string &section);
8010259SAndrew.Bardsley@arm.com
8110259SAndrew.Bardsley@arm.com    int cpuId() { return baseCpu->cpuId(); }
8210259SAndrew.Bardsley@arm.com
8310259SAndrew.Bardsley@arm.com    int contextId() { return _contextId; }
8410259SAndrew.Bardsley@arm.com
8510259SAndrew.Bardsley@arm.com    void setContextId(int id) { _contextId = id; }
8610259SAndrew.Bardsley@arm.com
8710259SAndrew.Bardsley@arm.com    void setThreadId(ThreadID id) { _threadId = id; }
8810259SAndrew.Bardsley@arm.com
8910259SAndrew.Bardsley@arm.com    ThreadID threadId() { return _threadId; }
9010259SAndrew.Bardsley@arm.com
9110259SAndrew.Bardsley@arm.com    Tick readLastActivate() { return lastActivate; }
9210259SAndrew.Bardsley@arm.com
9310259SAndrew.Bardsley@arm.com    Tick readLastSuspend() { return lastSuspend; }
9410259SAndrew.Bardsley@arm.com
9510259SAndrew.Bardsley@arm.com#if FULL_SYSTEM
9610259SAndrew.Bardsley@arm.com    void connectMemPorts(ThreadContext *tc);
9710259SAndrew.Bardsley@arm.com
9810259SAndrew.Bardsley@arm.com    void connectPhysPort();
9910259SAndrew.Bardsley@arm.com
10010259SAndrew.Bardsley@arm.com    void connectVirtPort(ThreadContext *tc);
10110259SAndrew.Bardsley@arm.com
10210259SAndrew.Bardsley@arm.com    void dumpFuncProfile();
10310259SAndrew.Bardsley@arm.com
10410259SAndrew.Bardsley@arm.com    EndQuiesceEvent *getQuiesceEvent() { return quiesceEvent; }
10510259SAndrew.Bardsley@arm.com
10610259SAndrew.Bardsley@arm.com    void profileClear();
10710259SAndrew.Bardsley@arm.com
10810259SAndrew.Bardsley@arm.com    void profileSample();
10910259SAndrew.Bardsley@arm.com
11010259SAndrew.Bardsley@arm.com    TheISA::Kernel::Statistics *getKernelStats() { return kernelStats; }
11110259SAndrew.Bardsley@arm.com
11210259SAndrew.Bardsley@arm.com    FunctionalPort *getPhysPort() { return physPort; }
11310259SAndrew.Bardsley@arm.com
11410259SAndrew.Bardsley@arm.com    void setPhysPort(FunctionalPort *port) { physPort = port; }
11510259SAndrew.Bardsley@arm.com
11610259SAndrew.Bardsley@arm.com    VirtualPort *getVirtPort() { return virtPort; }
11710259SAndrew.Bardsley@arm.com#else
11810259SAndrew.Bardsley@arm.com    Process *getProcessPtr() { return process; }
11910259SAndrew.Bardsley@arm.com
12010259SAndrew.Bardsley@arm.com    TranslatingPort *getMemPort();
12110259SAndrew.Bardsley@arm.com
12210259SAndrew.Bardsley@arm.com    void setMemPort(TranslatingPort *_port) { port = _port; }
12310259SAndrew.Bardsley@arm.com#endif
12410259SAndrew.Bardsley@arm.com
12510259SAndrew.Bardsley@arm.com    /** Reads the number of instructions functionally executed and
12610259SAndrew.Bardsley@arm.com     * committed.
12710259SAndrew.Bardsley@arm.com     */
12810259SAndrew.Bardsley@arm.com    Counter readFuncExeInst() { return funcExeInst; }
12910259SAndrew.Bardsley@arm.com
13010259SAndrew.Bardsley@arm.com    /** Sets the total number of instructions functionally executed
13110259SAndrew.Bardsley@arm.com     * and committed.
13210905Sandreas.sandberg@arm.com     */
13310259SAndrew.Bardsley@arm.com    void setFuncExeInst(Counter new_val) { funcExeInst = new_val; }
13410905Sandreas.sandberg@arm.com
13510259SAndrew.Bardsley@arm.com    /** Returns the status of this thread. */
13610259SAndrew.Bardsley@arm.com    Status status() const { return _status; }
13710259SAndrew.Bardsley@arm.com
13810905Sandreas.sandberg@arm.com    /** Sets the status of this thread. */
13910259SAndrew.Bardsley@arm.com    void setStatus(Status new_status) { _status = new_status; }
14010259SAndrew.Bardsley@arm.com
14110259SAndrew.Bardsley@arm.com  public:
14210259SAndrew.Bardsley@arm.com    /** Connects port to the functional port of the memory object
14310905Sandreas.sandberg@arm.com     * below the CPU. */
14410259SAndrew.Bardsley@arm.com    void connectToMemFunc(Port *port);
14510259SAndrew.Bardsley@arm.com
14610259SAndrew.Bardsley@arm.com    /** Number of instructions committed. */
14710905Sandreas.sandberg@arm.com    Counter numInst;
14810259SAndrew.Bardsley@arm.com    /** Stat for number instructions committed. */
14910905Sandreas.sandberg@arm.com    Stats::Scalar numInsts;
15010905Sandreas.sandberg@arm.com    /** Stat for number of memory references. */
15110259SAndrew.Bardsley@arm.com    Stats::Scalar numMemRefs;
15210259SAndrew.Bardsley@arm.com
15310259SAndrew.Bardsley@arm.com    /** Number of simulated loads, used for tracking events based on
15410905Sandreas.sandberg@arm.com     * the number of loads committed.
15510259SAndrew.Bardsley@arm.com     */
15610905Sandreas.sandberg@arm.com    Counter numLoad;
15710905Sandreas.sandberg@arm.com
15810259SAndrew.Bardsley@arm.com    /** The number of simulated loads committed prior to this run. */
15910259SAndrew.Bardsley@arm.com    Counter startNumLoad;
16010259SAndrew.Bardsley@arm.com
16110259SAndrew.Bardsley@arm.com  protected:
16210259SAndrew.Bardsley@arm.com    ThreadContext::Status _status;
16310259SAndrew.Bardsley@arm.com
16410259SAndrew.Bardsley@arm.com    // Pointer to the base CPU.
16510259SAndrew.Bardsley@arm.com    BaseCPU *baseCpu;
16610259SAndrew.Bardsley@arm.com
16710259SAndrew.Bardsley@arm.com    // system wide HW context id
16810259SAndrew.Bardsley@arm.com    int _contextId;
16910259SAndrew.Bardsley@arm.com
17010259SAndrew.Bardsley@arm.com    // Index of hardware thread context on the CPU that this represents.
17110259SAndrew.Bardsley@arm.com    ThreadID _threadId;
17210259SAndrew.Bardsley@arm.com
17310259SAndrew.Bardsley@arm.com  public:
17410259SAndrew.Bardsley@arm.com    /** Last time activate was called on this thread. */
17510259SAndrew.Bardsley@arm.com    Tick lastActivate;
17610259SAndrew.Bardsley@arm.com
17710259SAndrew.Bardsley@arm.com    /** Last time suspend was called on this thread. */
17810259SAndrew.Bardsley@arm.com    Tick lastSuspend;
17910259SAndrew.Bardsley@arm.com
18010259SAndrew.Bardsley@arm.com#if FULL_SYSTEM
18110259SAndrew.Bardsley@arm.com  public:
18210259SAndrew.Bardsley@arm.com    FunctionProfile *profile;
18310259SAndrew.Bardsley@arm.com    ProfileNode *profileNode;
18410259SAndrew.Bardsley@arm.com    Addr profilePC;
18510259SAndrew.Bardsley@arm.com    EndQuiesceEvent *quiesceEvent;
18610259SAndrew.Bardsley@arm.com
18710259SAndrew.Bardsley@arm.com    TheISA::Kernel::Statistics *kernelStats;
18810259SAndrew.Bardsley@arm.com  protected:
18910259SAndrew.Bardsley@arm.com    /** A functional port outgoing only for functional accesses to physical
19010259SAndrew.Bardsley@arm.com     * addresses.*/
19110407Smitch.hayenga@arm.com    FunctionalPort *physPort;
19210946Sandreas.sandberg@arm.com
19310946Sandreas.sandberg@arm.com    /** A functional port, outgoing only, for functional accesse to virtual
19410946Sandreas.sandberg@arm.com     * addresses. */
19510946Sandreas.sandberg@arm.com    VirtualPort *virtPort;
19610946Sandreas.sandberg@arm.com#else
19710946Sandreas.sandberg@arm.com    TranslatingPort *port;
19810946Sandreas.sandberg@arm.com
19910259SAndrew.Bardsley@arm.com    Process *process;
20010259SAndrew.Bardsley@arm.com#endif
20110913Sandreas.sandberg@arm.com
20210913Sandreas.sandberg@arm.com  public:
20310259SAndrew.Bardsley@arm.com    /*
20410259SAndrew.Bardsley@arm.com     * number of executed instructions, for matching with syscall trace
20510259SAndrew.Bardsley@arm.com     * points in EIO files.
20610259SAndrew.Bardsley@arm.com     */
20710259SAndrew.Bardsley@arm.com    Counter funcExeInst;
20810913Sandreas.sandberg@arm.com
20910259SAndrew.Bardsley@arm.com    //
21010913Sandreas.sandberg@arm.com    // Count failed store conditionals so we can warn of apparent
21110913Sandreas.sandberg@arm.com    // application deadlock situations.
21210259SAndrew.Bardsley@arm.com    unsigned storeCondFailures;
21310913Sandreas.sandberg@arm.com};
21410913Sandreas.sandberg@arm.com
21510259SAndrew.Bardsley@arm.com#endif // __CPU_THREAD_STATE_HH__
21610259SAndrew.Bardsley@arm.com