thread_context.cc revision 8232:b28d06a175be 
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Kevin Lim
29 */
30
31#include "base/misc.hh"
32#include "base/trace.hh"
33#include "config/the_isa.hh"
34#include "cpu/thread_context.hh"
35#include "debug/Context.hh"
36
37void
38ThreadContext::compare(ThreadContext *one, ThreadContext *two)
39{
40    DPRINTF(Context, "Comparing thread contexts\n");
41
42    // First loop through the integer registers.
43    for (int i = 0; i < TheISA::NumIntRegs; ++i) {
44        TheISA::IntReg t1 = one->readIntReg(i);
45        TheISA::IntReg t2 = two->readIntReg(i);
46        if (t1 != t2)
47            panic("Int reg idx %d doesn't match, one: %#x, two: %#x",
48                  i, t1, t2);
49    }
50
51    // Then loop through the floating point registers.
52    for (int i = 0; i < TheISA::NumFloatRegs; ++i) {
53        TheISA::FloatRegBits t1 = one->readFloatRegBits(i);
54        TheISA::FloatRegBits t2 = two->readFloatRegBits(i);
55        if (t1 != t2)
56            panic("Float reg idx %d doesn't match, one: %#x, two: %#x",
57                  i, t1, t2);
58    }
59#if FULL_SYSTEM
60    for (int i = 0; i < TheISA::NumMiscRegs; ++i) {
61        TheISA::MiscReg t1 = one->readMiscRegNoEffect(i);
62        TheISA::MiscReg t2 = two->readMiscRegNoEffect(i);
63        if (t1 != t2)
64            panic("Misc reg idx %d doesn't match, one: %#x, two: %#x",
65                  i, t1, t2);
66    }
67#endif
68
69    if (!(one->pcState() == two->pcState()))
70        panic("PC state doesn't match.");
71    int id1 = one->cpuId();
72    int id2 = two->cpuId();
73    if (id1 != id2)
74        panic("CPU ids don't match, one: %d, two: %d", id1, id2);
75
76    id1 = one->contextId();
77    id2 = two->contextId();
78    if (id1 != id2)
79        panic("Context ids don't match, one: %d, two: %d", id1, id2);
80
81
82}
83