1/*
2 * Copyright (c) 2012-2013, 2016-2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed here under.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Thomas Grass
38 *          Andreas Hansson
39 *          Sascha Bischoff
40 *          Neha Agarwal
41 */
42
43#include "cpu/testers/traffic_gen/base_gen.hh"
44
45#include <algorithm>
46
47#include "base/logging.hh"
48#include "base/random.hh"
49#include "base/trace.hh"
50#include "cpu/testers/traffic_gen/base.hh"
51#include "debug/TrafficGen.hh"
52#include "sim/system.hh"
53
54BaseGen::BaseGen(SimObject &obj, MasterID master_id, Tick _duration)
55    : _name(obj.name()), masterID(master_id),
56      duration(_duration)
57{
58}
59
60PacketPtr
61BaseGen::getPacket(Addr addr, unsigned size, const MemCmd& cmd,
62                   Request::FlagsType flags)
63{
64    // Create new request
65    RequestPtr req = std::make_shared<Request>(addr, size, flags, masterID);
66    // Dummy PC to have PC-based prefetchers latch on; get entropy into higher
67    // bits
68    req->setPC(((Addr)masterID) << 2);
69
70    // Embed it in a packet
71    PacketPtr pkt = new Packet(req, cmd);
72
73    uint8_t* pkt_data = new uint8_t[req->getSize()];
74    pkt->dataDynamic(pkt_data);
75
76    if (cmd.isWrite()) {
77        std::fill_n(pkt_data, req->getSize(), (uint8_t)masterID);
78    }
79
80    return pkt;
81}
82
83StochasticGen::StochasticGen(SimObject &obj,
84                             MasterID master_id, Tick _duration,
85                             Addr start_addr, Addr end_addr,
86                             Addr _blocksize, Addr cacheline_size,
87                             Tick min_period, Tick max_period,
88                             uint8_t read_percent, Addr data_limit)
89        : BaseGen(obj, master_id, _duration),
90          startAddr(start_addr), endAddr(end_addr),
91          blocksize(_blocksize), cacheLineSize(cacheline_size),
92          minPeriod(min_period), maxPeriod(max_period),
93          readPercent(read_percent), dataLimit(data_limit)
94{
95    if (blocksize > cacheLineSize)
96        fatal("TrafficGen %s block size (%d) is larger than "
97              "cache line size (%d)\n", name(),
98              blocksize, cacheLineSize);
99
100    if (read_percent > 100)
101        fatal("%s cannot have more than 100% reads", name());
102
103    if (min_period > max_period)
104        fatal("%s cannot have min_period > max_period", name());
105}
106