1# Copyright (c) 2010 Advanced Micro Devices, Inc.
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright
9# notice, this list of conditions and the following disclaimer in the
10# documentation and/or other materials provided with the distribution;
11# neither the name of the copyright holders nor the names of its
12# contributors may be used to endorse or promote products derived from
13# this software without specific prior written permission.
14#
15# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
18# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
19# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
20# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
21# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26#
27# Authors: Brad Beckmann
28
29from m5.SimObject import SimObject
30from m5.params import *
31from m5.proxy import *
32
33from m5.objects.ClockedObject import ClockedObject
34
35class DirectedGenerator(SimObject):
36    type = 'DirectedGenerator'
37    abstract = True
38    cxx_header = "cpu/testers/directedtest/DirectedGenerator.hh"
39    num_cpus = Param.Int("num of cpus")
40    system = Param.System(Parent.any, "System we belong to")
41
42class SeriesRequestGenerator(DirectedGenerator):
43    type = 'SeriesRequestGenerator'
44    cxx_header = "cpu/testers/directedtest/SeriesRequestGenerator.hh"
45    addr_increment_size = Param.Int(64, "address increment size")
46    num_series = Param.UInt32(1,
47        "number of different address streams to generate")
48    percent_writes = Param.Percent(50, "percent of access that are writes")
49
50class InvalidateGenerator(DirectedGenerator):
51    type = 'InvalidateGenerator'
52    cxx_header = "cpu/testers/directedtest/InvalidateGenerator.hh"
53    addr_increment_size = Param.Int(64, "address increment size")
54
55class RubyDirectedTester(ClockedObject):
56    type = 'RubyDirectedTester'
57    cxx_header = "cpu/testers/directedtest/RubyDirectedTester.hh"
58    cpuPort = VectorMasterPort("the cpu ports")
59    requests_to_complete = Param.Int("checks to complete")
60    generator = Param.DirectedGenerator("the request generator")
61