atomic.hh revision 8444:56de1f9320df 
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Steve Reinhardt
29 */
30
31#ifndef __CPU_SIMPLE_ATOMIC_HH__
32#define __CPU_SIMPLE_ATOMIC_HH__
33
34#include "cpu/simple/base.hh"
35#include "params/AtomicSimpleCPU.hh"
36
37class AtomicSimpleCPU : public BaseSimpleCPU
38{
39  public:
40
41    AtomicSimpleCPU(AtomicSimpleCPUParams *params);
42    virtual ~AtomicSimpleCPU();
43
44    virtual void init();
45
46  private:
47
48    struct TickEvent : public Event
49    {
50        AtomicSimpleCPU *cpu;
51
52        TickEvent(AtomicSimpleCPU *c);
53        void process();
54        const char *description() const;
55    };
56
57    TickEvent tickEvent;
58
59    const int width;
60    bool locked;
61    const bool simulate_data_stalls;
62    const bool simulate_inst_stalls;
63
64    // main simulation loop (one cycle)
65    void tick();
66
67    class CpuPort : public Port
68    {
69      public:
70
71        CpuPort(const std::string &_name, AtomicSimpleCPU *_cpu)
72            : Port(_name, _cpu), cpu(_cpu)
73        { }
74
75        bool snoopRangeSent;
76
77      protected:
78
79        AtomicSimpleCPU *cpu;
80
81        virtual bool recvTiming(PacketPtr pkt);
82
83        virtual Tick recvAtomic(PacketPtr pkt);
84
85        virtual void recvFunctional(PacketPtr pkt);
86
87        virtual void recvStatusChange(Status status);
88
89        virtual void recvRetry();
90
91        virtual void getDeviceAddressRanges(AddrRangeList &resp,
92            bool &snoop)
93        { resp.clear(); snoop = true; }
94
95    };
96    CpuPort icachePort;
97
98    class DcachePort : public CpuPort
99    {
100      public:
101        DcachePort(const std::string &_name, AtomicSimpleCPU *_cpu)
102            : CpuPort(_name, _cpu)
103        { }
104
105        virtual void setPeer(Port *port);
106    };
107    DcachePort dcachePort;
108
109    CpuPort physmemPort;
110    bool hasPhysMemPort;
111    Request ifetch_req;
112    Request data_read_req;
113    Request data_write_req;
114
115    bool dcache_access;
116    Tick dcache_latency;
117
118    Range<Addr> physMemAddr;
119
120  public:
121
122    virtual Port *getPort(const std::string &if_name, int idx = -1);
123
124    virtual void serialize(std::ostream &os);
125    virtual void unserialize(Checkpoint *cp, const std::string &section);
126    virtual void resume();
127
128    void switchOut();
129    void takeOverFrom(BaseCPU *oldCPU);
130
131    virtual void activateContext(int thread_num, int delay);
132    virtual void suspendContext(int thread_num);
133
134    Fault readMem(Addr addr, uint8_t *data, unsigned size, unsigned flags);
135
136    Fault writeMem(uint8_t *data, unsigned size,
137                   Addr addr, unsigned flags, uint64_t *res);
138
139    /**
140     * Print state of address in memory system via PrintReq (for
141     * debugging).
142     */
143    void printAddr(Addr a);
144};
145
146#endif // __CPU_SIMPLE_ATOMIC_HH__
147