14202Sbinkertn@umich.edu# -*- mode:python -*-
24202Sbinkertn@umich.edu
34202Sbinkertn@umich.edu# Copyright (c) 2006 The Regents of The University of Michigan
44202Sbinkertn@umich.edu# All rights reserved.
54202Sbinkertn@umich.edu#
64202Sbinkertn@umich.edu# Redistribution and use in source and binary forms, with or without
74202Sbinkertn@umich.edu# modification, are permitted provided that the following conditions are
84202Sbinkertn@umich.edu# met: redistributions of source code must retain the above copyright
94202Sbinkertn@umich.edu# notice, this list of conditions and the following disclaimer;
104202Sbinkertn@umich.edu# redistributions in binary form must reproduce the above copyright
114202Sbinkertn@umich.edu# notice, this list of conditions and the following disclaimer in the
124202Sbinkertn@umich.edu# documentation and/or other materials provided with the distribution;
134202Sbinkertn@umich.edu# neither the name of the copyright holders nor the names of its
144202Sbinkertn@umich.edu# contributors may be used to endorse or promote products derived from
154202Sbinkertn@umich.edu# this software without specific prior written permission.
164202Sbinkertn@umich.edu#
174202Sbinkertn@umich.edu# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
184202Sbinkertn@umich.edu# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
194202Sbinkertn@umich.edu# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
204202Sbinkertn@umich.edu# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
214202Sbinkertn@umich.edu# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
224202Sbinkertn@umich.edu# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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244202Sbinkertn@umich.edu# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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264202Sbinkertn@umich.edu# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
274202Sbinkertn@umich.edu# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
284202Sbinkertn@umich.edu#
294202Sbinkertn@umich.edu# Authors: Nathan Binkert
304202Sbinkertn@umich.edu
314202Sbinkertn@umich.eduImport('*')
324202Sbinkertn@umich.edu
334202Sbinkertn@umich.eduneed_simple_base = False
344202Sbinkertn@umich.eduif 'AtomicSimpleCPU' in env['CPU_MODELS']:
354202Sbinkertn@umich.edu    need_simple_base = True
364486Sbinkertn@umich.edu    SimObject('AtomicSimpleCPU.py')
374202Sbinkertn@umich.edu    Source('atomic.cc')
384202Sbinkertn@umich.edu
3913012Sandreas.sandberg@arm.com    # The NonCachingSimpleCPU is really an atomic CPU in
4013012Sandreas.sandberg@arm.com    # disguise. It's therefore always enabled when the atomic CPU is
4113012Sandreas.sandberg@arm.com    # enabled.
4213012Sandreas.sandberg@arm.com    SimObject('NonCachingSimpleCPU.py')
4313012Sandreas.sandberg@arm.com    Source('noncaching.cc')
4413012Sandreas.sandberg@arm.com
454202Sbinkertn@umich.eduif 'TimingSimpleCPU' in env['CPU_MODELS']:
464202Sbinkertn@umich.edu    need_simple_base = True
474486Sbinkertn@umich.edu    SimObject('TimingSimpleCPU.py')
484202Sbinkertn@umich.edu    Source('timing.cc')
494202Sbinkertn@umich.edu
505192Ssaidi@eecs.umich.eduif 'AtomicSimpleCPU' in env['CPU_MODELS'] or \
515192Ssaidi@eecs.umich.edu       'TimingSimpleCPU' in env['CPU_MODELS']:
528335Snate@binkert.org    DebugFlag('SimpleCPU')
535192Ssaidi@eecs.umich.edu
544202Sbinkertn@umich.eduif need_simple_base:
554202Sbinkertn@umich.edu    Source('base.cc')
565529Snate@binkert.org    SimObject('BaseSimpleCPU.py')
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