1/*
2 * Copyright (c) 2014 The University of Wisconsin
3 *
4 * Copyright (c) 2006 INRIA (Institut National de Recherche en
5 * Informatique et en Automatique  / French National Research Institute
6 * for Computer Science and Applied Mathematics)
7 *
8 * All rights reserved.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions are
12 * met: redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer;
14 * redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution;
17 * neither the name of the copyright holders nor the names of its
18 * contributors may be used to endorse or promote products derived from
19 * this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 *
33 * Authors: Vignyan Reddy, Dibakar Gope and Arthur Perais,
34 * from André Seznec's code.
35 */
36
37/* @file
38 * Implementation of a L-TAGE branch predictor
39 */
40
41#include "cpu/pred/ltage.hh"
42
43#include "base/intmath.hh"
44#include "base/logging.hh"
45#include "base/random.hh"
46#include "base/trace.hh"
47#include "debug/Fetch.hh"
48#include "debug/LTage.hh"
49
50LTAGE::LTAGE(const LTAGEParams *params)
51  : TAGE(params), loopPredictor(params->loop_predictor)
52{
53}
54
55void
56LTAGE::init()
57{
58    TAGE::init();
59}
60
61//prediction
62bool
63LTAGE::predict(ThreadID tid, Addr branch_pc, bool cond_branch, void* &b)
64{
65    LTageBranchInfo *bi = new LTageBranchInfo(*tage, *loopPredictor);
66    b = (void*)(bi);
67
68    bool pred_taken = tage->tagePredict(tid, branch_pc, cond_branch,
69                                        bi->tageBranchInfo);
70
71    pred_taken = loopPredictor->loopPredict(tid, branch_pc, cond_branch,
72                                            bi->lpBranchInfo, pred_taken,
73                                            instShiftAmt);
74    if (cond_branch) {
75        if (bi->lpBranchInfo->loopPredUsed) {
76            bi->tageBranchInfo->provider = LOOP;
77        }
78        DPRINTF(LTage, "Predict for %lx: taken?:%d, loopTaken?:%d, "
79                "loopValid?:%d, loopUseCounter:%d, tagePred:%d, altPred:%d\n",
80                branch_pc, pred_taken, bi->lpBranchInfo->loopPred,
81                bi->lpBranchInfo->loopPredValid,
82                loopPredictor->getLoopUseCounter(),
83                bi->tageBranchInfo->tagePred, bi->tageBranchInfo->altTaken);
84    }
85
86    // record final prediction
87    bi->lpBranchInfo->predTaken = pred_taken;
88
89    return pred_taken;
90}
91
92// PREDICTOR UPDATE
93void
94LTAGE::update(ThreadID tid, Addr branch_pc, bool taken, void* bp_history,
95              bool squashed, const StaticInstPtr & inst, Addr corrTarget)
96{
97    assert(bp_history);
98
99    LTageBranchInfo* bi = static_cast<LTageBranchInfo*>(bp_history);
100
101    assert(corrTarget != MaxAddr);
102
103    if (squashed) {
104        if (tage->isSpeculativeUpdateEnabled()) {
105            // This restores the global history, then update it
106            // and recomputes the folded histories.
107            tage->squash(tid, taken, bi->tageBranchInfo, corrTarget);
108
109            if (bi->tageBranchInfo->condBranch) {
110                loopPredictor->squashLoop(bi->lpBranchInfo);
111            }
112        }
113        return;
114    }
115
116    int nrand = random_mt.random<int>() & 3;
117    if (bi->tageBranchInfo->condBranch) {
118        DPRINTF(LTage, "Updating tables for branch:%lx; taken?:%d\n",
119                branch_pc, taken);
120        tage->updateStats(taken, bi->tageBranchInfo);
121
122        loopPredictor->updateStats(taken, bi->lpBranchInfo);
123
124        loopPredictor->condBranchUpdate(tid, branch_pc, taken,
125            bi->tageBranchInfo->tagePred, bi->lpBranchInfo, instShiftAmt);
126
127        tage->condBranchUpdate(tid, branch_pc, taken, bi->tageBranchInfo,
128            nrand, corrTarget, bi->lpBranchInfo->predTaken);
129    }
130
131    tage->updateHistories(tid, branch_pc, taken, bi->tageBranchInfo, false,
132                          inst, corrTarget);
133
134    delete bi;
135}
136
137void
138LTAGE::squash(ThreadID tid, void *bp_history)
139{
140    LTageBranchInfo* bi = (LTageBranchInfo*)(bp_history);
141
142    if (bi->tageBranchInfo->condBranch) {
143        loopPredictor->squash(tid, bi->lpBranchInfo);
144    }
145
146    TAGE::squash(tid, bp_history);
147}
148
149void
150LTAGE::regStats()
151{
152    TAGE::regStats();
153}
154
155LTAGE*
156LTAGEParams::create()
157{
158    return new LTAGE(this);
159}
160