rename_map.cc revision 1464
19814Sandreas.hansson@arm.com 22292SN/A#include <vector> 313590Srekai.gonzalezalberquilla@arm.com 410239Sbinhpham@cs.rutgers.edu#include "cpu/beta_cpu/rename_map.hh" 57597Sminkyu.jeong@arm.com 67597Sminkyu.jeong@arm.comusing namespace std; 77597Sminkyu.jeong@arm.com 87597Sminkyu.jeong@arm.com// Todo: Consider making functions inline. Avoid having things that are 97597Sminkyu.jeong@arm.com// using the zero register or misc registers from adding on the registers 107597Sminkyu.jeong@arm.com// to the free list. Possibly remove the direct communication between 117597Sminkyu.jeong@arm.com// this and the freelist. Considering making inline bool functions that 127597Sminkyu.jeong@arm.com// determine if the register is a logical int, logical fp, physical int, 137597Sminkyu.jeong@arm.com// physical fp, etc. 147597Sminkyu.jeong@arm.com 157597Sminkyu.jeong@arm.comSimpleRenameMap::SimpleRenameMap(unsigned _numLogicalIntRegs, 162292SN/A unsigned _numPhysicalIntRegs, 172292SN/A unsigned _numLogicalFloatRegs, 182292SN/A unsigned _numPhysicalFloatRegs, 192292SN/A unsigned _numMiscRegs, 202292SN/A RegIndex _intZeroReg, 212292SN/A RegIndex _floatZeroReg) 222292SN/A : numLogicalIntRegs(_numLogicalIntRegs), 232292SN/A numPhysicalIntRegs(_numPhysicalIntRegs), 242292SN/A numLogicalFloatRegs(_numLogicalFloatRegs), 252292SN/A numPhysicalFloatRegs(_numPhysicalFloatRegs), 262292SN/A numMiscRegs(_numMiscRegs), 272292SN/A intZeroReg(_intZeroReg), 282292SN/A floatZeroReg(_floatZeroReg) 292292SN/A{ 302292SN/A DPRINTF(Rename, "Rename: Creating rename map. Phys: %i / %i, Float: " 312292SN/A "%i / %i.\n", numLogicalIntRegs, numPhysicalIntRegs, 322292SN/A numLogicalFloatRegs, numPhysicalFloatRegs); 332292SN/A 342292SN/A numLogicalRegs = numLogicalIntRegs + numLogicalFloatRegs; 352292SN/A 362292SN/A numPhysicalRegs = numPhysicalIntRegs + numPhysicalFloatRegs; 372292SN/A 382292SN/A //Create the rename maps, and their scoreboards. 392292SN/A intRenameMap = new RenameEntry[numLogicalIntRegs]; 402292SN/A floatRenameMap = new RenameEntry[numLogicalRegs]; 412689Sktlim@umich.edu 422689Sktlim@umich.edu // Should combine this into one scoreboard. 432689Sktlim@umich.edu intScoreboard.resize(numPhysicalIntRegs); 442292SN/A floatScoreboard.resize(numPhysicalRegs); 452292SN/A miscScoreboard.resize(numPhysicalRegs + numMiscRegs); 469944Smatt.horsnell@ARM.com 479944Smatt.horsnell@ARM.com // Initialize the entries in the integer rename map to point to the 489944Smatt.horsnell@ARM.com // physical registers of the same index, and consider each register 498591Sgblack@eecs.umich.edu // ready until the first rename occurs. 503326Sktlim@umich.edu for (RegIndex index = 0; index < numLogicalIntRegs; ++index) 518229Snate@binkert.org { 526658Snate@binkert.org intRenameMap[index].physical_reg = index; 538887Sgeoffrey.blake@arm.com intScoreboard[index] = 1; 542907Sktlim@umich.edu } 552292SN/A 568232Snate@binkert.org // Initialize the rest of the physical registers (the ones that don't 578232Snate@binkert.org // directly map to a logical register) as unready. 588232Snate@binkert.org for (PhysRegIndex index = numLogicalIntRegs; 599527SMatt.Horsnell@arm.com index < numPhysicalIntRegs; 602722Sktlim@umich.edu ++index) 612669Sktlim@umich.edu { 622292SN/A intScoreboard[index] = 0; 632669Sktlim@umich.edu } 6413429Srekai.gonzalezalberquilla@arm.com 6513429Srekai.gonzalezalberquilla@arm.com int float_reg_idx = numPhysicalIntRegs; 668581Ssteve.reinhardt@amd.com 678581Ssteve.reinhardt@amd.com // Initialize the entries in the floating point rename map to point to 682292SN/A // the physical registers of the same index, and consider each register 6913590Srekai.gonzalezalberquilla@arm.com // ready until the first rename occurs. 7013590Srekai.gonzalezalberquilla@arm.com // Although the index refers purely to architected registers, because 712292SN/A // the floating reg indices come after the integer reg indices, they 722292SN/A // may exceed the size of a normal RegIndex (short). 732669Sktlim@umich.edu for (PhysRegIndex index = numLogicalIntRegs; 742292SN/A index < numLogicalRegs; ++index) 752678Sktlim@umich.edu { 762292SN/A floatRenameMap[index].physical_reg = float_reg_idx++; 779444SAndreas.Sandberg@ARM.com } 789444SAndreas.Sandberg@ARM.com 799444SAndreas.Sandberg@ARM.com for (PhysRegIndex index = numPhysicalIntRegs; 804319Sktlim@umich.edu index < numPhysicalIntRegs + numLogicalFloatRegs; ++index) 8113590Srekai.gonzalezalberquilla@arm.com { 8213590Srekai.gonzalezalberquilla@arm.com floatScoreboard[index] = 1; 832678Sktlim@umich.edu } 842678Sktlim@umich.edu 852292SN/A // Initialize the rest of the physical registers (the ones that don't 862678Sktlim@umich.edu // directly map to a logical register) as unready. 872678Sktlim@umich.edu for (PhysRegIndex index = numPhysicalIntRegs + numLogicalFloatRegs; 885336Shines@cs.fsu.edu index < numPhysicalRegs; 892678Sktlim@umich.edu ++index) 904873Sstever@eecs.umich.edu { 912678Sktlim@umich.edu floatScoreboard[index] = 0; 922292SN/A } 9313590Srekai.gonzalezalberquilla@arm.com 9413590Srekai.gonzalezalberquilla@arm.com // Initialize the entries in the misc register scoreboard to be ready. 9513590Srekai.gonzalezalberquilla@arm.com for (PhysRegIndex index = numPhysicalRegs; 9613590Srekai.gonzalezalberquilla@arm.com index < numPhysicalRegs + numMiscRegs; ++index) 9713590Srekai.gonzalezalberquilla@arm.com { 9813590Srekai.gonzalezalberquilla@arm.com miscScoreboard[index] = 1; 9913590Srekai.gonzalezalberquilla@arm.com } 10013590Srekai.gonzalezalberquilla@arm.com} 10113590Srekai.gonzalezalberquilla@arm.com 10213590Srekai.gonzalezalberquilla@arm.comSimpleRenameMap::~SimpleRenameMap() 10313590Srekai.gonzalezalberquilla@arm.com{ 10413590Srekai.gonzalezalberquilla@arm.com // Delete the rename maps as they were allocated with new. 10513590Srekai.gonzalezalberquilla@arm.com delete [] intRenameMap; 10613590Srekai.gonzalezalberquilla@arm.com delete [] floatRenameMap; 10713590Srekai.gonzalezalberquilla@arm.com} 10813590Srekai.gonzalezalberquilla@arm.com 10913590Srekai.gonzalezalberquilla@arm.comvoid 11013590Srekai.gonzalezalberquilla@arm.comSimpleRenameMap::setFreeList(SimpleFreeList *fl_ptr) 1112678Sktlim@umich.edu{ 1122678Sktlim@umich.edu //Setup the interface to the freelist. 1132678Sktlim@umich.edu freeList = fl_ptr; 1142678Sktlim@umich.edu} 1152678Sktlim@umich.edu 1162678Sktlim@umich.edu 1172344SN/A// Don't allow this stage to fault; force that check to the rename stage. 11813590Srekai.gonzalezalberquilla@arm.com// Simply ask to rename a logical register and get back a new physical 1192678Sktlim@umich.edu// register index. 12013590Srekai.gonzalezalberquilla@arm.comSimpleRenameMap::RenameInfo 12113590Srekai.gonzalezalberquilla@arm.comSimpleRenameMap::rename(RegIndex arch_reg) 12213590Srekai.gonzalezalberquilla@arm.com{ 1236974Stjones1@inf.ed.ac.uk PhysRegIndex renamed_reg; 1249444SAndreas.Sandberg@ARM.com PhysRegIndex prev_reg; 12510327Smitch.hayenga@arm.com 12613590Srekai.gonzalezalberquilla@arm.com if (arch_reg < numLogicalIntRegs) { 12713652Sqtt2@cornell.edu 12812216Snikos.nikoleris@arm.com // Record the current physical register that is renamed to the 12913652Sqtt2@cornell.edu // requested architected register. 13013652Sqtt2@cornell.edu prev_reg = intRenameMap[arch_reg].physical_reg; 13113590Srekai.gonzalezalberquilla@arm.com 13213652Sqtt2@cornell.edu // If it's not referencing the zero register, then mark the register 13313590Srekai.gonzalezalberquilla@arm.com // as not ready. 13413590Srekai.gonzalezalberquilla@arm.com if (arch_reg != intZeroReg) { 13513590Srekai.gonzalezalberquilla@arm.com // Get a free physical register to rename to. 1366974Stjones1@inf.ed.ac.uk renamed_reg = freeList->getIntReg(); 13713590Srekai.gonzalezalberquilla@arm.com 13813652Sqtt2@cornell.edu // Update the integer rename map. 13913652Sqtt2@cornell.edu intRenameMap[arch_reg].physical_reg = renamed_reg; 14013590Srekai.gonzalezalberquilla@arm.com 1412678Sktlim@umich.edu assert(renamed_reg >= 0 && renamed_reg < numPhysicalIntRegs); 1422344SN/A 1432292SN/A // Mark register as not ready. 1442292SN/A intScoreboard[renamed_reg] = false; 1452292SN/A } else { 14613472Srekai.gonzalezalberquilla@arm.com // Otherwise return the zero register so nothing bad happens. 14713472Srekai.gonzalezalberquilla@arm.com renamed_reg = intZeroReg; 14813472Srekai.gonzalezalberquilla@arm.com } 14913590Srekai.gonzalezalberquilla@arm.com } else if (arch_reg < numLogicalRegs) { 15013590Srekai.gonzalezalberquilla@arm.com // Subtract off the base offset for floating point registers. 1512292SN/A// arch_reg = arch_reg - numLogicalIntRegs; 1522292SN/A 1532292SN/A // Record the current physical register that is renamed to the 1542292SN/A // requested architected register. 1552292SN/A prev_reg = floatRenameMap[arch_reg].physical_reg; 1565529Snate@binkert.org 15713472Srekai.gonzalezalberquilla@arm.com // If it's not referencing the zero register, then mark the register 1582292SN/A // as not ready. 15913472Srekai.gonzalezalberquilla@arm.com if (arch_reg != floatZeroReg) { 16013472Srekai.gonzalezalberquilla@arm.com // Get a free floating point register to rename to. 1614329Sktlim@umich.edu renamed_reg = freeList->getFloatReg(); 1624329Sktlim@umich.edu 1634329Sktlim@umich.edu // Update the floating point rename map. 1642907Sktlim@umich.edu floatRenameMap[arch_reg].physical_reg = renamed_reg; 1652907Sktlim@umich.edu 16613472Srekai.gonzalezalberquilla@arm.com assert(renamed_reg < numPhysicalRegs && 1672292SN/A renamed_reg >= numPhysicalIntRegs); 1688199SAli.Saidi@ARM.com 1698199SAli.Saidi@ARM.com // Mark register as not ready. 1709444SAndreas.Sandberg@ARM.com floatScoreboard[renamed_reg] = false; 1719444SAndreas.Sandberg@ARM.com } else { 1729444SAndreas.Sandberg@ARM.com // Otherwise return the zero register so nothing bad happens. 1739444SAndreas.Sandberg@ARM.com renamed_reg = floatZeroReg; 1749444SAndreas.Sandberg@ARM.com } 1759444SAndreas.Sandberg@ARM.com } else { 1769444SAndreas.Sandberg@ARM.com // Subtract off the base offset for miscellaneous registers. 1779444SAndreas.Sandberg@ARM.com arch_reg = arch_reg - numLogicalRegs; 1789444SAndreas.Sandberg@ARM.com 1799444SAndreas.Sandberg@ARM.com // No renaming happens to the misc. registers. They are simply the 1809444SAndreas.Sandberg@ARM.com // registers that come after all the physical registers; thus 1818199SAli.Saidi@ARM.com // take the base architected register and add the physical registers 1822292SN/A // to it. 18313590Srekai.gonzalezalberquilla@arm.com renamed_reg = arch_reg + numPhysicalRegs; 1842292SN/A 1853492Sktlim@umich.edu // Set the previous register to the same register; mainly it must be 1862329SN/A // known that the prev reg was outside the range of normal registers 1872292SN/A // so the free list can avoid adding it. 1889444SAndreas.Sandberg@ARM.com prev_reg = renamed_reg; 1899444SAndreas.Sandberg@ARM.com 1909814Sandreas.hansson@arm.com assert(renamed_reg < numPhysicalRegs + numMiscRegs); 1912292SN/A 1922292SN/A miscScoreboard[renamed_reg] = false; 1932292SN/A } 1942292SN/A 1952292SN/A return RenameInfo(renamed_reg, prev_reg); 1962292SN/A} 1972292SN/A 1982292SN/A//Perhaps give this a pair as a return value, of the physical register 1992292SN/A//and whether or not it's ready. 20010386Sandreas.hansson@arm.comPhysRegIndex 2012292SN/ASimpleRenameMap::lookup(RegIndex arch_reg) 2022292SN/A{ 2032292SN/A if (arch_reg < numLogicalIntRegs) { 2042292SN/A return intRenameMap[arch_reg].physical_reg; 2052292SN/A } else if (arch_reg < numLogicalRegs) { 2062727Sktlim@umich.edu // Subtract off the base FP offset. 2072727Sktlim@umich.edu// arch_reg = arch_reg - numLogicalIntRegs; 2082727Sktlim@umich.edu 2092727Sktlim@umich.edu return floatRenameMap[arch_reg].physical_reg; 2102727Sktlim@umich.edu } else { 2112727Sktlim@umich.edu // Subtract off the misc registers offset. 2122727Sktlim@umich.edu arch_reg = arch_reg - numLogicalRegs; 2132727Sktlim@umich.edu 2142727Sktlim@umich.edu // Misc. regs don't rename, so simply add the base arch reg to 2152727Sktlim@umich.edu // the number of physical registers. 2162727Sktlim@umich.edu return numPhysicalRegs + arch_reg; 2172727Sktlim@umich.edu } 2182727Sktlim@umich.edu} 2192727Sktlim@umich.edu 2202727Sktlim@umich.edubool 2212727Sktlim@umich.eduSimpleRenameMap::isReady(PhysRegIndex phys_reg) 2222727Sktlim@umich.edu{ 2232727Sktlim@umich.edu if (phys_reg < numPhysicalIntRegs) { 2242361SN/A return intScoreboard[phys_reg]; 2252361SN/A } else if (phys_reg < numPhysicalRegs) { 2262361SN/A 2272361SN/A // Subtract off the base FP offset. 2282727Sktlim@umich.edu// phys_reg = phys_reg - numPhysicalIntRegs; 2292727Sktlim@umich.edu 2302727Sktlim@umich.edu return floatScoreboard[phys_reg]; 2312727Sktlim@umich.edu } else { 2322727Sktlim@umich.edu // Subtract off the misc registers offset. 2332727Sktlim@umich.edu// phys_reg = phys_reg - numPhysicalRegs; 2342727Sktlim@umich.edu 2352727Sktlim@umich.edu return miscScoreboard[phys_reg]; 2362727Sktlim@umich.edu } 2372727Sktlim@umich.edu} 2382727Sktlim@umich.edu 2392727Sktlim@umich.edu// In this implementation the miscellaneous registers do not actually rename, 2402727Sktlim@umich.edu// so this function does not allow you to try to change their mappings. 2412727Sktlim@umich.eduvoid 2422727Sktlim@umich.eduSimpleRenameMap::setEntry(RegIndex arch_reg, PhysRegIndex renamed_reg) 2432727Sktlim@umich.edu{ 2442727Sktlim@umich.edu if (arch_reg < numLogicalIntRegs) { 2452727Sktlim@umich.edu DPRINTF(Rename, "Rename Map: Integer register %i being set to %i.\n", 2462727Sktlim@umich.edu (int)arch_reg, renamed_reg); 2472727Sktlim@umich.edu 2482727Sktlim@umich.edu intRenameMap[arch_reg].physical_reg = renamed_reg; 2492727Sktlim@umich.edu } else { 2502727Sktlim@umich.edu assert(arch_reg < (numLogicalIntRegs + numLogicalFloatRegs)); 2518922Swilliam.wang@arm.com 2524329Sktlim@umich.edu DPRINTF(Rename, "Rename Map: Float register %i being set to %i.\n", 2534329Sktlim@umich.edu (int)arch_reg - numLogicalIntRegs, renamed_reg); 2544329Sktlim@umich.edu 2554329Sktlim@umich.edu floatRenameMap[arch_reg].physical_reg = renamed_reg; 2564329Sktlim@umich.edu } 2574329Sktlim@umich.edu} 2589444SAndreas.Sandberg@ARM.com 2592307SN/Avoid 26013590Srekai.gonzalezalberquilla@arm.comSimpleRenameMap::squash(vector<RegIndex> freed_regs, 26113590Srekai.gonzalezalberquilla@arm.com vector<UnmapInfo> unmaps) 2622307SN/A{ 2632329SN/A panic("Not sure this function should be called."); 2649444SAndreas.Sandberg@ARM.com 2652307SN/A // Not sure the rename map should be able to access the free list 2662307SN/A // like this. 2672307SN/A while (!freed_regs.empty()) { 2682307SN/A RegIndex free_register = freed_regs.back(); 2692307SN/A 2702307SN/A if (free_register < numPhysicalIntRegs) { 2719444SAndreas.Sandberg@ARM.com freeList->addIntReg(free_register); 2722307SN/A } else { 2732307SN/A // Subtract off the base FP dependence tag. 2742292SN/A free_register = free_register - numPhysicalIntRegs; 2752292SN/A freeList->addFloatReg(free_register); 27613429Srekai.gonzalezalberquilla@arm.com } 2772292SN/A 2782292SN/A freed_regs.pop_back(); 2792292SN/A } 28013652Sqtt2@cornell.edu 2812292SN/A // Take unmap info and roll back the rename map. 2822292SN/A} 2832292SN/A 2842292SN/Avoid 2852292SN/ASimpleRenameMap::markAsReady(PhysRegIndex ready_reg) 2862292SN/A{ 2872292SN/A DPRINTF(Rename, "Rename map: Marking register %i as ready.\n", 2882292SN/A (int)ready_reg); 2892292SN/A 2902292SN/A if (ready_reg < numPhysicalIntRegs) { 2912292SN/A assert(ready_reg >= 0); 2922292SN/A 29313429Srekai.gonzalezalberquilla@arm.com intScoreboard[ready_reg] = 1; 2942292SN/A } else if (ready_reg < numPhysicalRegs) { 29513590Srekai.gonzalezalberquilla@arm.com 29613590Srekai.gonzalezalberquilla@arm.com // Subtract off the base FP offset. 2972292SN/A// ready_reg = ready_reg - numPhysicalIntRegs; 2987720Sgblack@eecs.umich.edu 29913590Srekai.gonzalezalberquilla@arm.com floatScoreboard[ready_reg] = 1; 3002292SN/A } else { 30113590Srekai.gonzalezalberquilla@arm.com //Subtract off the misc registers offset. 30213590Srekai.gonzalezalberquilla@arm.com// ready_reg = ready_reg - numPhysicalRegs; 3032292SN/A 30413590Srekai.gonzalezalberquilla@arm.com miscScoreboard[ready_reg] = 1; 3052292SN/A } 30613590Srekai.gonzalezalberquilla@arm.com} 30713590Srekai.gonzalezalberquilla@arm.com 30813590Srekai.gonzalezalberquilla@arm.comint 30913590Srekai.gonzalezalberquilla@arm.comSimpleRenameMap::numFreeEntries() 3102292SN/A{ 3112292SN/A int free_int_regs = freeList->numFreeIntRegs(); 3122292SN/A int free_float_regs = freeList->numFreeFloatRegs(); 3132292SN/A 3142292SN/A if (free_int_regs < free_float_regs) { 3152292SN/A return free_int_regs; 31613590Srekai.gonzalezalberquilla@arm.com } else { 3172292SN/A return free_float_regs; 3182292SN/A } 31913590Srekai.gonzalezalberquilla@arm.com} 32013590Srekai.gonzalezalberquilla@arm.com