1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Kevin Lim
29 */
30
31#ifndef __CPU_O3_IMPL_HH__
32#define __CPU_O3_IMPL_HH__
33
34#include "arch/isa_traits.hh"
35#include "config/the_isa.hh"
36#include "cpu/o3/cpu_policy.hh"
37
38// Forward declarations.
39template <class Impl>
40class BaseO3DynInst;
41
42template <class Impl>
43class FullO3CPU;
44
45/** Implementation specific struct that defines several key types to the
46 *  CPU, the stages within the CPU, the time buffers, and the DynInst.
47 *  The struct defines the ISA, the CPU policy, the specific DynInst, the
48 *  specific O3CPU, and all of the structs from the time buffers to do
49 *  communication.
50 *  This is one of the key things that must be defined for each hardware
51 *  specific CPU implementation.
52 */
53struct O3CPUImpl
54{
55    /** The type of MachInst. */
56    typedef TheISA::MachInst MachInst;
57
58    /** The CPU policy to be used, which defines all of the CPU stages. */
59    typedef SimpleCPUPolicy<O3CPUImpl> CPUPol;
60
61    /** The DynInst type to be used. */
62    typedef BaseO3DynInst<O3CPUImpl> DynInst;
63
64    /** The refcounted DynInst pointer to be used.  In most cases this is
65     *  what should be used, and not DynInst *.
66     */
67    typedef RefCountingPtr<DynInst> DynInstPtr;
68    typedef RefCountingPtr<const DynInst> DynInstConstPtr;
69
70    /** The O3CPU type to be used. */
71    typedef FullO3CPU<O3CPUImpl> O3CPU;
72
73    /** Same typedef, but for CPUType.  BaseDynInst may not always use
74     * an O3 CPU, so it's clearer to call it CPUType instead in that
75     * case.
76     */
77    typedef O3CPU CPUType;
78
79    enum {
80      MaxWidth = 8,
81      MaxThreads = 4
82    };
83};
84
85#endif // __CPU_O3_SPARC_IMPL_HH__
86