free_list.hh revision 1060
12810SN/A#ifndef __FREE_LIST_HH__ 210028SGiacomo.Gabrielli@arm.com#define __FREE_LIST_HH__ 39663Suri.wiener@arm.com 49663Suri.wiener@arm.com#include <iostream> 59663Suri.wiener@arm.com#include <queue> 69663Suri.wiener@arm.com 79663Suri.wiener@arm.com#include "arch/alpha/isa_traits.hh" 89663Suri.wiener@arm.com#include "cpu/beta_cpu/comm.hh" 99663Suri.wiener@arm.com#include "base/trace.hh" 109663Suri.wiener@arm.com 119663Suri.wiener@arm.comusing namespace std; 129663Suri.wiener@arm.com 139663Suri.wiener@arm.com// Question: Do I even need the number of logical registers? 142810SN/A// How to avoid freeing registers instantly? Same with ROB entries. 157636Ssteve.reinhardt@amd.com 162810SN/A/** 172810SN/A * FreeList class that simply holds the list of free integer and floating 182810SN/A * point registers. Can request for a free register of either type, and 192810SN/A * also send back free registers of either type. This is a very simple 202810SN/A * class, but it should be sufficient for most implementations. Like all 212810SN/A * other classes, it assumes that the indices for the floating point 222810SN/A * registers starts after the integer registers end. Hence the variable 232810SN/A * numPhysicalIntRegs is logically equivalent to the baseFP dependency. 242810SN/A * Note that 252810SN/A * while this most likely should be called FreeList, the name "FreeList" 262810SN/A * is used in a typedef within the CPU Policy, and therefore no class 272810SN/A * can be named simply "FreeList". 282810SN/A * @todo: Give a better name to the base FP dependency. 292810SN/A */ 302810SN/Aclass SimpleFreeList 312810SN/A{ 322810SN/A public: 332810SN/A 342810SN/A private: 352810SN/A /** The list of free integer registers. */ 362810SN/A queue<PhysRegIndex> freeIntRegs; 372810SN/A 382810SN/A /** The list of free floating point registers. */ 392810SN/A queue<PhysRegIndex> freeFloatRegs; 402810SN/A 412810SN/A /** Number of logical integer registers. */ 422810SN/A int numLogicalIntRegs; 432810SN/A 442810SN/A /** Number of physical integer registers. */ 452810SN/A int numPhysicalIntRegs; 462810SN/A 472810SN/A /** Number of logical floating point registers. */ 482810SN/A int numLogicalFloatRegs; 492810SN/A 506216Snate@binkert.org /** Number of physical floating point registers. */ 516216Snate@binkert.org int numPhysicalFloatRegs; 522810SN/A 532810SN/A /** Total number of physical registers. */ 542810SN/A int numPhysicalRegs; 556216Snate@binkert.org 566216Snate@binkert.org public: 578232Snate@binkert.org SimpleFreeList(unsigned _numLogicalIntRegs, 586216Snate@binkert.org unsigned _numPhysicalIntRegs, 595338Sstever@gmail.com unsigned _numLogicalFloatRegs, 606216Snate@binkert.org unsigned _numPhysicalFloatRegs); 612810SN/A 622810SN/A PhysRegIndex getIntReg(); 632810SN/A 649725Sandreas.hansson@arm.com PhysRegIndex getFloatReg(); 6510503SCurtis.Dunham@arm.com 6610503SCurtis.Dunham@arm.com void addReg(PhysRegIndex freed_reg); 6710503SCurtis.Dunham@arm.com 6810503SCurtis.Dunham@arm.com void addIntReg(PhysRegIndex freed_reg); 6910503SCurtis.Dunham@arm.com 702810SN/A void addFloatReg(PhysRegIndex freed_reg); 712810SN/A 722810SN/A bool hasFreeIntRegs() 734903SN/A { return !freeIntRegs.empty(); } 744903SN/A 754903SN/A bool hasFreeFloatRegs() 764903SN/A { return !freeFloatRegs.empty(); } 774903SN/A 784903SN/A int numFreeIntRegs() 794903SN/A { return freeIntRegs.size(); } 804908SN/A 815875Ssteve.reinhardt@amd.com int numFreeFloatRegs() 824903SN/A { return freeFloatRegs.size(); } 835875Ssteve.reinhardt@amd.com}; 844903SN/A 854903SN/Ainline PhysRegIndex 864903SN/ASimpleFreeList::getIntReg() 874903SN/A{ 887669Ssteve.reinhardt@amd.com DPRINTF(Rename, "FreeList: Trying to get free integer register.\n"); 897669Ssteve.reinhardt@amd.com if (freeIntRegs.empty()) { 907669Ssteve.reinhardt@amd.com panic("No free integer registers!"); 917669Ssteve.reinhardt@amd.com } 924903SN/A 934903SN/A PhysRegIndex free_reg = freeIntRegs.front(); 945318SN/A 954908SN/A freeIntRegs.pop(); 965318SN/A 979543Ssascha.bischoff@arm.com return(free_reg); 989543Ssascha.bischoff@arm.com} 999543Ssascha.bischoff@arm.com 1009543Ssascha.bischoff@arm.cominline PhysRegIndex 1014908SN/ASimpleFreeList::getFloatReg() 1024908SN/A{ 1034908SN/A DPRINTF(Rename, "FreeList: Trying to get free float register.\n"); 1044908SN/A if (freeFloatRegs.empty()) { 1054903SN/A panic("No free integer registers!"); 1064903SN/A } 1075875Ssteve.reinhardt@amd.com 1084903SN/A PhysRegIndex free_reg = freeFloatRegs.front(); 1094903SN/A 1104903SN/A freeFloatRegs.pop(); 1117667Ssteve.reinhardt@amd.com 1127667Ssteve.reinhardt@amd.com return(free_reg); 1137667Ssteve.reinhardt@amd.com} 1147667Ssteve.reinhardt@amd.com 1157667Ssteve.reinhardt@amd.cominline void 1167667Ssteve.reinhardt@amd.comSimpleFreeList::addReg(PhysRegIndex freed_reg) 1177667Ssteve.reinhardt@amd.com{ 1187667Ssteve.reinhardt@amd.com DPRINTF(Rename, "Freelist: Freeing register %i.\n", freed_reg); 1197667Ssteve.reinhardt@amd.com //Might want to add in a check for whether or not this register is 1207669Ssteve.reinhardt@amd.com //already in there. A bit vector or something similar would be useful. 1217669Ssteve.reinhardt@amd.com if (freed_reg < numPhysicalIntRegs) { 1227669Ssteve.reinhardt@amd.com freeIntRegs.push(freed_reg); 1237667Ssteve.reinhardt@amd.com } else if (freed_reg < numPhysicalRegs) { 1247667Ssteve.reinhardt@amd.com freeFloatRegs.push(freed_reg); 1257667Ssteve.reinhardt@amd.com } 1267667Ssteve.reinhardt@amd.com} 1274903SN/A 1284903SN/Ainline void 1294903SN/ASimpleFreeList::addIntReg(PhysRegIndex freed_reg) 1304903SN/A{ 1314903SN/A DPRINTF(Rename, "Freelist: Freeing int register %i.\n", freed_reg); 1324903SN/A 1334903SN/A //Might want to add in a check for whether or not this register is 1344903SN/A //already in there. A bit vector or something similar would be useful. 1357667Ssteve.reinhardt@amd.com freeIntRegs.push(freed_reg); 1364903SN/A} 1374903SN/A 1384903SN/Ainline void 1394903SN/ASimpleFreeList::addFloatReg(PhysRegIndex freed_reg) 1404903SN/A{ 1414903SN/A DPRINTF(Rename, "Freelist: Freeing float register %i.\n", freed_reg); 1422810SN/A 1434908SN/A //Might want to add in a check for whether or not this register is 1444908SN/A //already in there. A bit vector or something similar would be useful. 1454908SN/A freeFloatRegs.push(freed_reg); 1464908SN/A} 1475318SN/A 1489543Ssascha.bischoff@arm.com#endif // __FREE_LIST_HH__ 1499543Ssascha.bischoff@arm.com