thread_context.hh revision 6314:781969fbeca9 
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Kevin Lim
29 */
30
31#ifndef __CPU_CHECKER_THREAD_CONTEXT_HH__
32#define __CPU_CHECKER_THREAD_CONTEXT_HH__
33
34#include "arch/types.hh"
35#include "cpu/checker/cpu.hh"
36#include "cpu/simple_thread.hh"
37#include "cpu/thread_context.hh"
38
39class EndQuiesceEvent;
40namespace TheISA {
41    namespace Kernel {
42        class Statistics;
43    };
44};
45
46/**
47 * Derived ThreadContext class for use with the Checker.  The template
48 * parameter is the ThreadContext class used by the specific CPU being
49 * verified.  This CheckerThreadContext is then used by the main CPU
50 * in place of its usual ThreadContext class.  It handles updating the
51 * checker's state any time state is updated externally through the
52 * ThreadContext.
53 */
54template <class TC>
55class CheckerThreadContext : public ThreadContext
56{
57  public:
58    CheckerThreadContext(TC *actual_tc,
59                         CheckerCPU *checker_cpu)
60        : actualTC(actual_tc), checkerTC(checker_cpu->thread),
61          checkerCPU(checker_cpu)
62    { }
63
64  private:
65    /** The main CPU's ThreadContext, or class that implements the
66     * ThreadContext interface. */
67    TC *actualTC;
68    /** The checker's own SimpleThread. Will be updated any time
69     * anything uses this ThreadContext to externally update a
70     * thread's state. */
71    SimpleThread *checkerTC;
72    /** Pointer to the checker CPU. */
73    CheckerCPU *checkerCPU;
74
75  public:
76
77    BaseCPU *getCpuPtr() { return actualTC->getCpuPtr(); }
78
79    void setCpuId(int id)
80    {
81        actualTC->setCpuId(id);
82        checkerTC->setCpuId(id);
83    }
84
85    int cpuId() { return actualTC->cpuId(); }
86
87    TheISA::TLB *getITBPtr() { return actualTC->getITBPtr(); }
88
89    TheISA::TLB *getDTBPtr() { return actualTC->getDTBPtr(); }
90
91#if FULL_SYSTEM
92    System *getSystemPtr() { return actualTC->getSystemPtr(); }
93
94    PhysicalMemory *getPhysMemPtr() { return actualTC->getPhysMemPtr(); }
95
96    TheISA::Kernel::Statistics *getKernelStats()
97    { return actualTC->getKernelStats(); }
98
99    FunctionalPort *getPhysPort() { return actualTC->getPhysPort(); }
100
101    VirtualPort *getVirtPort()
102    { return actualTC->getVirtPort(); }
103#else
104    TranslatingPort *getMemPort() { return actualTC->getMemPort(); }
105
106    Process *getProcessPtr() { return actualTC->getProcessPtr(); }
107#endif
108
109    Status status() const { return actualTC->status(); }
110
111    void setStatus(Status new_status)
112    {
113        actualTC->setStatus(new_status);
114        checkerTC->setStatus(new_status);
115    }
116
117    /// Set the status to Active.  Optional delay indicates number of
118    /// cycles to wait before beginning execution.
119    void activate(int delay = 1) { actualTC->activate(delay); }
120
121    /// Set the status to Suspended.
122    void suspend() { actualTC->suspend(); }
123
124    /// Set the status to Halted.
125    void halt() { actualTC->halt(); }
126
127#if FULL_SYSTEM
128    void dumpFuncProfile() { actualTC->dumpFuncProfile(); }
129#endif
130
131    void takeOverFrom(ThreadContext *oldContext)
132    {
133        actualTC->takeOverFrom(oldContext);
134        checkerTC->copyState(oldContext);
135    }
136
137    void regStats(const std::string &name) { actualTC->regStats(name); }
138
139    void serialize(std::ostream &os) { actualTC->serialize(os); }
140    void unserialize(Checkpoint *cp, const std::string &section)
141    { actualTC->unserialize(cp, section); }
142
143#if FULL_SYSTEM
144    EndQuiesceEvent *getQuiesceEvent() { return actualTC->getQuiesceEvent(); }
145
146    Tick readLastActivate() { return actualTC->readLastActivate(); }
147    Tick readLastSuspend() { return actualTC->readLastSuspend(); }
148
149    void profileClear() { return actualTC->profileClear(); }
150    void profileSample() { return actualTC->profileSample(); }
151#endif
152
153    int threadId() { return actualTC->threadId(); }
154
155    // @todo: Do I need this?
156    MachInst getInst() { return actualTC->getInst(); }
157
158    // @todo: Do I need this?
159    void copyArchRegs(ThreadContext *tc)
160    {
161        actualTC->copyArchRegs(tc);
162        checkerTC->copyArchRegs(tc);
163    }
164
165    void clearArchRegs()
166    {
167        actualTC->clearArchRegs();
168        checkerTC->clearArchRegs();
169    }
170
171    //
172    // New accessors for new decoder.
173    //
174    uint64_t readIntReg(int reg_idx)
175    { return actualTC->readIntReg(reg_idx); }
176
177    FloatReg readFloatReg(int reg_idx)
178    { return actualTC->readFloatReg(reg_idx); }
179
180    FloatRegBits readFloatRegBits(int reg_idx)
181    { return actualTC->readFloatRegBits(reg_idx); }
182
183    void setIntReg(int reg_idx, uint64_t val)
184    {
185        actualTC->setIntReg(reg_idx, val);
186        checkerTC->setIntReg(reg_idx, val);
187    }
188
189    void setFloatReg(int reg_idx, FloatReg val)
190    {
191        actualTC->setFloatReg(reg_idx, val);
192        checkerTC->setFloatReg(reg_idx, val);
193    }
194
195    void setFloatRegBits(int reg_idx, FloatRegBits val)
196    {
197        actualTC->setFloatRegBits(reg_idx, val);
198        checkerTC->setFloatRegBits(reg_idx, val);
199    }
200
201    uint64_t readPC() { return actualTC->readPC(); }
202
203    void setPC(uint64_t val)
204    {
205        actualTC->setPC(val);
206        checkerTC->setPC(val);
207        checkerCPU->recordPCChange(val);
208    }
209
210    uint64_t readNextPC() { return actualTC->readNextPC(); }
211
212    void setNextPC(uint64_t val)
213    {
214        actualTC->setNextPC(val);
215        checkerTC->setNextPC(val);
216        checkerCPU->recordNextPCChange(val);
217    }
218
219    uint64_t readNextNPC() { return actualTC->readNextNPC(); }
220
221    void setNextNPC(uint64_t val)
222    {
223        actualTC->setNextNPC(val);
224        checkerTC->setNextNPC(val);
225        checkerCPU->recordNextPCChange(val);
226    }
227
228    MiscReg readMiscRegNoEffect(int misc_reg)
229    { return actualTC->readMiscRegNoEffect(misc_reg); }
230
231    MiscReg readMiscReg(int misc_reg)
232    { return actualTC->readMiscReg(misc_reg); }
233
234    void setMiscRegNoEffect(int misc_reg, const MiscReg &val)
235    {
236        checkerTC->setMiscRegNoEffect(misc_reg, val);
237        actualTC->setMiscRegNoEffect(misc_reg, val);
238    }
239
240    void setMiscReg(int misc_reg, const MiscReg &val)
241    {
242        checkerTC->setMiscReg(misc_reg, val);
243        actualTC->setMiscReg(misc_reg, val);
244    }
245
246    unsigned readStCondFailures()
247    { return actualTC->readStCondFailures(); }
248
249    void setStCondFailures(unsigned sc_failures)
250    {
251        checkerTC->setStCondFailures(sc_failures);
252        actualTC->setStCondFailures(sc_failures);
253    }
254
255    // @todo: Fix this!
256    bool misspeculating() { return actualTC->misspeculating(); }
257
258#if !FULL_SYSTEM
259    Counter readFuncExeInst() { return actualTC->readFuncExeInst(); }
260#endif
261};
262
263#endif // __CPU_CHECKER_EXEC_CONTEXT_HH__
264