thread_context.hh revision 2350
112137Sar4jc@virginia.edu/*
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2812137Sar4jc@virginia.edu
2912137Sar4jc@virginia.edu#ifndef __CPU_CHECKER_EXEC_CONTEXT_HH__
3012137Sar4jc@virginia.edu#define __CPU_CHECKER_EXEC_CONTEXT_HH__
3112137Sar4jc@virginia.edu
3212137Sar4jc@virginia.edu#include "cpu/checker/cpu.hh"
3312137Sar4jc@virginia.edu#include "cpu/cpu_exec_context.hh"
3412137Sar4jc@virginia.edu#include "cpu/exec_context.hh"
3512137Sar4jc@virginia.edu
3612137Sar4jc@virginia.educlass EndQuiesceEvent;
3712137Sar4jc@virginia.edunamespace Kernel {
3812137Sar4jc@virginia.edu    class Statistics;
3912137Sar4jc@virginia.edu};
4012137Sar4jc@virginia.edu
4112137Sar4jc@virginia.edu/**
4212137Sar4jc@virginia.edu * Derived ExecContext class for use with the Checker.  The template
4312137Sar4jc@virginia.edu * parameter is the ExecContext class used by the specific CPU being
4412137Sar4jc@virginia.edu * verified.  This CheckerExecContext is then used by the main CPU in
4512137Sar4jc@virginia.edu * place of its usual ExecContext class.  It handles updating the
4612137Sar4jc@virginia.edu * checker's state any time state is updated through the ExecContext.
4712137Sar4jc@virginia.edu */
4812137Sar4jc@virginia.edutemplate <class XC>
4912137Sar4jc@virginia.educlass CheckerExecContext : public ExecContext
5012137Sar4jc@virginia.edu{
5112137Sar4jc@virginia.edu  public:
5212137Sar4jc@virginia.edu    CheckerExecContext(XC *actual_xc,
5312137Sar4jc@virginia.edu                       CheckerCPU *checker_cpu)
5412137Sar4jc@virginia.edu        : actualXC(actual_xc), checkerXC(checker_cpu->cpuXC),
5512137Sar4jc@virginia.edu          checkerCPU(checker_cpu)
5612137Sar4jc@virginia.edu    { }
5712137Sar4jc@virginia.edu
5812137Sar4jc@virginia.edu  private:
5912137Sar4jc@virginia.edu    XC *actualXC;
6012137Sar4jc@virginia.edu    CPUExecContext *checkerXC;
6112137Sar4jc@virginia.edu    CheckerCPU *checkerCPU;
6212137Sar4jc@virginia.edu
6312137Sar4jc@virginia.edu  public:
6412137Sar4jc@virginia.edu
6512137Sar4jc@virginia.edu    BaseCPU *getCpuPtr() { return actualXC->getCpuPtr(); }
6612137Sar4jc@virginia.edu
6712137Sar4jc@virginia.edu    void setCpuId(int id)
6812137Sar4jc@virginia.edu    {
6912137Sar4jc@virginia.edu        actualXC->setCpuId(id);
7012137Sar4jc@virginia.edu        checkerXC->setCpuId(id);
7112137Sar4jc@virginia.edu    }
7212137Sar4jc@virginia.edu
7312137Sar4jc@virginia.edu    int readCpuId() { return actualXC->readCpuId(); }
7412137Sar4jc@virginia.edu
7512137Sar4jc@virginia.edu    FunctionalMemory *getMemPtr() { return actualXC->getMemPtr(); }
7612137Sar4jc@virginia.edu
7712137Sar4jc@virginia.edu#if FULL_SYSTEM
7812137Sar4jc@virginia.edu    System *getSystemPtr() { return actualXC->getSystemPtr(); }
7912137Sar4jc@virginia.edu
8012137Sar4jc@virginia.edu    PhysicalMemory *getPhysMemPtr() { return actualXC->getPhysMemPtr(); }
8112137Sar4jc@virginia.edu
8212137Sar4jc@virginia.edu    AlphaITB *getITBPtr() { return actualXC->getITBPtr(); }
8312137Sar4jc@virginia.edu
8412137Sar4jc@virginia.edu    AlphaDTB *getDTBPtr() { return actualXC->getDTBPtr(); }
8512137Sar4jc@virginia.edu
8612137Sar4jc@virginia.edu    Kernel::Statistics *getKernelStats() { return actualXC->getKernelStats(); }
8712137Sar4jc@virginia.edu#else
8812137Sar4jc@virginia.edu    Process *getProcessPtr() { return actualXC->getProcessPtr(); }
8912137Sar4jc@virginia.edu#endif
9012137Sar4jc@virginia.edu
9112137Sar4jc@virginia.edu    Status status() const { return actualXC->status(); }
9212137Sar4jc@virginia.edu
9312137Sar4jc@virginia.edu    void setStatus(Status new_status)
9412137Sar4jc@virginia.edu    {
9512137Sar4jc@virginia.edu        actualXC->setStatus(new_status);
9612137Sar4jc@virginia.edu        checkerXC->setStatus(new_status);
9712137Sar4jc@virginia.edu    }
9812137Sar4jc@virginia.edu
9912137Sar4jc@virginia.edu    /// Set the status to Active.  Optional delay indicates number of
10012137Sar4jc@virginia.edu    /// cycles to wait before beginning execution.
10112137Sar4jc@virginia.edu    void activate(int delay = 1) { actualXC->activate(delay); }
10212137Sar4jc@virginia.edu
10312137Sar4jc@virginia.edu    /// Set the status to Suspended.
10412137Sar4jc@virginia.edu    void suspend() { actualXC->suspend(); }
10512137Sar4jc@virginia.edu
10612137Sar4jc@virginia.edu    /// Set the status to Unallocated.
10712137Sar4jc@virginia.edu    void deallocate() { actualXC->deallocate(); }
10812137Sar4jc@virginia.edu
10912137Sar4jc@virginia.edu    /// Set the status to Halted.
11012137Sar4jc@virginia.edu    void halt() { actualXC->halt(); }
11112137Sar4jc@virginia.edu
11212137Sar4jc@virginia.edu#if FULL_SYSTEM
11312137Sar4jc@virginia.edu    void dumpFuncProfile() { actualXC->dumpFuncProfile(); }
11412137Sar4jc@virginia.edu#endif
11512137Sar4jc@virginia.edu
11612137Sar4jc@virginia.edu    void takeOverFrom(ExecContext *oldContext)
11712137Sar4jc@virginia.edu    {
11812137Sar4jc@virginia.edu        actualXC->takeOverFrom(oldContext);
11912137Sar4jc@virginia.edu        checkerXC->takeOverFrom(oldContext);
12012137Sar4jc@virginia.edu    }
12112137Sar4jc@virginia.edu
12212137Sar4jc@virginia.edu    void regStats(const std::string &name) { actualXC->regStats(name); }
12312137Sar4jc@virginia.edu
12412137Sar4jc@virginia.edu    void serialize(std::ostream &os) { actualXC->serialize(os); }
12512137Sar4jc@virginia.edu    void unserialize(Checkpoint *cp, const std::string &section)
12612137Sar4jc@virginia.edu    { actualXC->unserialize(cp, section); }
12712137Sar4jc@virginia.edu
12812137Sar4jc@virginia.edu#if FULL_SYSTEM
12912137Sar4jc@virginia.edu    EndQuiesceEvent *getQuiesceEvent() { return actualXC->getQuiesceEvent(); }
13012137Sar4jc@virginia.edu
13112137Sar4jc@virginia.edu    Tick readLastActivate() { return actualXC->readLastActivate(); }
13212137Sar4jc@virginia.edu    Tick readLastSuspend() { return actualXC->readLastSuspend(); }
13312137Sar4jc@virginia.edu
13412137Sar4jc@virginia.edu    void profileClear() { return actualXC->profileClear(); }
13512137Sar4jc@virginia.edu    void profileSample() { return actualXC->profileSample(); }
13612137Sar4jc@virginia.edu#endif
13712137Sar4jc@virginia.edu
13812137Sar4jc@virginia.edu    int getThreadNum() { return actualXC->getThreadNum(); }
13912137Sar4jc@virginia.edu
14012137Sar4jc@virginia.edu    // @todo: Do I need this?
14112137Sar4jc@virginia.edu    MachInst getInst() { return actualXC->getInst(); }
14212137Sar4jc@virginia.edu
14312137Sar4jc@virginia.edu    // @todo: Do I need this?
14412137Sar4jc@virginia.edu    void copyArchRegs(ExecContext *xc)
14512137Sar4jc@virginia.edu    {
14612137Sar4jc@virginia.edu        actualXC->copyArchRegs(xc);
14712137Sar4jc@virginia.edu        checkerXC->copyArchRegs(xc);
14812137Sar4jc@virginia.edu    }
14912137Sar4jc@virginia.edu
15012137Sar4jc@virginia.edu    void clearArchRegs()
15112137Sar4jc@virginia.edu    {
15212137Sar4jc@virginia.edu        actualXC->clearArchRegs();
15312137Sar4jc@virginia.edu        checkerXC->clearArchRegs();
15412137Sar4jc@virginia.edu    }
15512137Sar4jc@virginia.edu
15612137Sar4jc@virginia.edu    //
15712137Sar4jc@virginia.edu    // New accessors for new decoder.
15812137Sar4jc@virginia.edu    //
15912137Sar4jc@virginia.edu    uint64_t readIntReg(int reg_idx)
16012137Sar4jc@virginia.edu    { return actualXC->readIntReg(reg_idx); }
16112137Sar4jc@virginia.edu
16212137Sar4jc@virginia.edu    float readFloatRegSingle(int reg_idx)
16312137Sar4jc@virginia.edu    { return actualXC->readFloatRegSingle(reg_idx); }
16412137Sar4jc@virginia.edu
16512137Sar4jc@virginia.edu    double readFloatRegDouble(int reg_idx)
16612137Sar4jc@virginia.edu    { return actualXC->readFloatRegDouble(reg_idx); }
16712137Sar4jc@virginia.edu
16812137Sar4jc@virginia.edu    uint64_t readFloatRegInt(int reg_idx)
16912137Sar4jc@virginia.edu    { return actualXC->readFloatRegInt(reg_idx); }
170
171    void setIntReg(int reg_idx, uint64_t val)
172    {
173        actualXC->setIntReg(reg_idx, val);
174        checkerXC->setIntReg(reg_idx, val);
175    }
176
177    void setFloatRegSingle(int reg_idx, float val)
178    {
179        actualXC->setFloatRegSingle(reg_idx, val);
180        checkerXC->setFloatRegSingle(reg_idx, val);
181    }
182
183    void setFloatRegDouble(int reg_idx, double val)
184    {
185        actualXC->setFloatRegDouble(reg_idx, val);
186        checkerXC->setFloatRegSingle(reg_idx, val);
187    }
188
189    void setFloatRegInt(int reg_idx, uint64_t val)
190    {
191        actualXC->setFloatRegInt(reg_idx, val);
192        checkerXC->setFloatRegInt(reg_idx, val);
193    }
194
195    uint64_t readPC() { return actualXC->readPC(); }
196
197    void setPC(uint64_t val)
198    {
199        actualXC->setPC(val);
200        checkerXC->setPC(val);
201        checkerCPU->recordPCChange(val);
202    }
203
204    uint64_t readNextPC() { return actualXC->readNextPC(); }
205
206    void setNextPC(uint64_t val)
207    {
208        actualXC->setNextPC(val);
209        checkerXC->setNextPC(val);
210        checkerCPU->recordNextPCChange(val);
211    }
212
213    MiscReg readMiscReg(int misc_reg)
214    { return actualXC->readMiscReg(misc_reg); }
215
216    MiscReg readMiscRegWithEffect(int misc_reg, Fault &fault)
217    { return actualXC->readMiscRegWithEffect(misc_reg, fault); }
218
219    Fault setMiscReg(int misc_reg, const MiscReg &val)
220    {
221        checkerXC->setMiscReg(misc_reg, val);
222        return actualXC->setMiscReg(misc_reg, val);
223    }
224
225    Fault setMiscRegWithEffect(int misc_reg, const MiscReg &val)
226    {
227        checkerXC->setMiscRegWithEffect(misc_reg, val);
228        return actualXC->setMiscRegWithEffect(misc_reg, val);
229    }
230
231    unsigned readStCondFailures()
232    { return actualXC->readStCondFailures(); }
233
234    void setStCondFailures(unsigned sc_failures)
235    {
236        checkerXC->setStCondFailures(sc_failures);
237        actualXC->setStCondFailures(sc_failures);
238    }
239#if FULL_SYSTEM
240    bool inPalMode() { return actualXC->inPalMode(); }
241#endif
242
243    // @todo: Fix this!
244    bool misspeculating() { return actualXC->misspeculating(); }
245
246#if !FULL_SYSTEM
247    IntReg getSyscallArg(int i) { return actualXC->getSyscallArg(i); }
248
249    // used to shift args for indirect syscall
250    void setSyscallArg(int i, IntReg val)
251    {
252        checkerXC->setSyscallArg(i, val);
253        actualXC->setSyscallArg(i, val);
254    }
255
256    void setSyscallReturn(SyscallReturn return_value)
257    {
258        checkerXC->setSyscallReturn(return_value);
259        actualXC->setSyscallReturn(return_value);
260    }
261
262    Counter readFuncExeInst() { return actualXC->readFuncExeInst(); }
263#endif
264};
265
266#endif // __CPU_CHECKER_EXEC_CONTEXT_HH__
267