SConscript revision 5799
12155SN/A# -*- mode:python -*- 22155SN/A 32155SN/A# Copyright (c) 2006 The Regents of The University of Michigan 42155SN/A# All rights reserved. 52155SN/A# 62155SN/A# Redistribution and use in source and binary forms, with or without 72155SN/A# modification, are permitted provided that the following conditions are 82155SN/A# met: redistributions of source code must retain the above copyright 92155SN/A# notice, this list of conditions and the following disclaimer; 102155SN/A# redistributions in binary form must reproduce the above copyright 112155SN/A# notice, this list of conditions and the following disclaimer in the 122155SN/A# documentation and/or other materials provided with the distribution; 132155SN/A# neither the name of the copyright holders nor the names of its 142155SN/A# contributors may be used to endorse or promote products derived from 152155SN/A# this software without specific prior written permission. 162155SN/A# 172155SN/A# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 182155SN/A# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 192155SN/A# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 202155SN/A# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 212155SN/A# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 222155SN/A# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 232155SN/A# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 242155SN/A# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 252155SN/A# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 262155SN/A# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 272155SN/A# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 282665Ssaidi@eecs.umich.edu# 292665Ssaidi@eecs.umich.edu# Authors: Steve Reinhardt 302155SN/A 314202Sbinkertn@umich.eduImport('*') 322155SN/A 332178SN/A################################################################# 342178SN/A# 352178SN/A# Generate StaticInst execute() method signatures. 362178SN/A# 372178SN/A# There must be one signature for each CPU model compiled in. 382178SN/A# Since the set of compiled-in models is flexible, we generate a 392178SN/A# header containing the appropriate set of signatures on the fly. 402178SN/A# 412178SN/A################################################################# 422178SN/A 432178SN/A# CPU model-specific data is contained in cpu_models.py 442178SN/A# Convert to SCons File node to get path handling 452155SN/Amodels_db = File('cpu_models.py') 462178SN/A# slurp in contents of file 472155SN/Aexecfile(models_db.srcnode().abspath) 482155SN/A 492178SN/A# Template for execute() signature. 502155SN/Aexec_sig_template = ''' 512155SN/Avirtual Fault execute(%s *xc, Trace::InstRecord *traceData) const = 0; 522623SN/Avirtual Fault initiateAcc(%s *xc, Trace::InstRecord *traceData) const 533918Ssaidi@eecs.umich.edu{ panic("initiateAcc not defined!"); M5_DUMMY_RETURN }; 542623SN/Avirtual Fault completeAcc(Packet *pkt, %s *xc, 552623SN/A Trace::InstRecord *traceData) const 563918Ssaidi@eecs.umich.edu{ panic("completeAcc not defined!"); M5_DUMMY_RETURN }; 572155SN/A''' 582155SN/A 592292SN/Amem_ini_sig_template = ''' 603918Ssaidi@eecs.umich.eduvirtual Fault initiateAcc(%s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); M5_DUMMY_RETURN }; 612292SN/A''' 622292SN/A 632292SN/Amem_comp_sig_template = ''' 643918Ssaidi@eecs.umich.eduvirtual Fault completeAcc(uint8_t *data, %s *xc, Trace::InstRecord *traceData) const { panic("Not defined!"); return NoFault; M5_DUMMY_RETURN }; 652292SN/A''' 662292SN/A 672766Sktlim@umich.edu# Generate a temporary CPU list, including the CheckerCPU if 682766Sktlim@umich.edu# it's enabled. This isn't used for anything else other than StaticInst 692766Sktlim@umich.edu# headers. 702921Sktlim@umich.edutemp_cpu_list = env['CPU_MODELS'][:] 712921Sktlim@umich.edu 722766Sktlim@umich.eduif env['USE_CHECKER']: 732766Sktlim@umich.edu temp_cpu_list.append('CheckerCPU') 742766Sktlim@umich.edu SimObject('CheckerCPU.py') 754762Snate@binkert.org 762155SN/A# Generate header. 772155SN/Adef gen_cpu_exec_signatures(target, source, env): 782155SN/A f = open(str(target[0]), 'w') 792155SN/A print >> f, ''' 802155SN/A#ifndef __CPU_STATIC_INST_EXEC_SIGS_HH__ 812155SN/A#define __CPU_STATIC_INST_EXEC_SIGS_HH__ 822766Sktlim@umich.edu''' 832155SN/A for cpu in temp_cpu_list: 842623SN/A xc_type = CpuModel.dict[cpu].strings['CPU_exec_context'] 852155SN/A print >> f, exec_sig_template % (xc_type, xc_type, xc_type) 862155SN/A print >> f, ''' 872155SN/A#endif // __CPU_STATIC_INST_EXEC_SIGS_HH__ 882155SN/A''' 892178SN/A 902178SN/A# Generate string that gets printed when header is rebuilt 912178SN/Adef gen_sigs_string(target, source, env): 922766Sktlim@umich.edu return "Generating static_inst_exec_sigs.hh: " \ 932178SN/A + ', '.join(temp_cpu_list) 942178SN/A 952178SN/A# Add command to generate header to environment. 962178SN/Aenv.Command('static_inst_exec_sigs.hh', models_db, 972766Sktlim@umich.edu Action(gen_cpu_exec_signatures, gen_sigs_string, 982766Sktlim@umich.edu varlist = temp_cpu_list)) 992766Sktlim@umich.edu 1002788Sktlim@umich.eduenv.Depends('static_inst_exec_sigs.hh', Value(env['USE_CHECKER'])) 1012178SN/Aenv.Depends('static_inst_exec_sigs.hh', Value(env['CPU_MODELS'])) 1022733Sktlim@umich.edu 1032733Sktlim@umich.edu# List of suppported CPUs by the Checker. Errors out if USE_CHECKER=True 1042817Sksewell@umich.edu# and one of these are not being used. 1052733Sktlim@umich.eduCheckerSupportedCPUList = ['O3CPU', 'OzoneCPU'] 1064486Sbinkertn@umich.edu 1074486Sbinkertn@umich.eduSimObject('BaseCPU.py') 1084486Sbinkertn@umich.eduSimObject('FuncUnit.py') 1094202Sbinkertn@umich.eduSimObject('ExeTracer.py') 1104202Sbinkertn@umich.eduSimObject('IntelTrace.py') 1114202Sbinkertn@umich.edu 1124202Sbinkertn@umich.eduSource('activity.cc') 1134202Sbinkertn@umich.eduSource('base.cc') 1144202Sbinkertn@umich.eduSource('cpuevent.cc') 1154202Sbinkertn@umich.eduSource('exetrace.cc') 1164202Sbinkertn@umich.eduSource('func_unit.cc') 1174202Sbinkertn@umich.eduSource('inteltrace.cc') 1184202Sbinkertn@umich.eduSource('pc_event.cc') 1192155SN/ASource('quiesce_event.cc') 1204202Sbinkertn@umich.eduSource('static_inst.cc') 1214486Sbinkertn@umich.eduSource('simple_thread.cc') 1224486Sbinkertn@umich.eduSource('thread_context.cc') 1234202Sbinkertn@umich.eduSource('thread_state.cc') 1244202Sbinkertn@umich.edu 1252821Sktlim@umich.eduif env['FULL_SYSTEM']: 1262766Sktlim@umich.edu SimObject('IntrControl.py') 1274202Sbinkertn@umich.edu 1282733Sktlim@umich.edu Source('intr_control.cc') 1292733Sktlim@umich.edu Source('profile.cc') 1302733Sktlim@umich.edu 1312733Sktlim@umich.edu if env['TARGET_ISA'] == 'sparc': 1322733Sktlim@umich.edu SimObject('LegionTrace.py') 1332874Sktlim@umich.edu Source('legiontrace.cc') 1342874Sktlim@umich.edu 1352874Sktlim@umich.eduif env['TARGET_ISA'] == 'x86': 1364202Sbinkertn@umich.edu SimObject('NativeTrace.py') 1372733Sktlim@umich.edu Source('nativetrace.cc') 138 139if env['USE_CHECKER']: 140 Source('checker/cpu.cc') 141 TraceFlag('Checker') 142 checker_supports = False 143 for i in CheckerSupportedCPUList: 144 if i in env['CPU_MODELS']: 145 checker_supports = True 146 if not checker_supports: 147 print "Checker only supports CPU models", 148 for i in CheckerSupportedCPUList: 149 print i, 150 print ", please set USE_CHECKER=False or use one of those CPU models" 151 Exit(1) 152 153TraceFlag('Activity') 154TraceFlag('Commit') 155TraceFlag('Context') 156TraceFlag('Decode') 157TraceFlag('DynInst') 158TraceFlag('ExecEnable') 159TraceFlag('ExecCPSeq') 160TraceFlag('ExecEffAddr') 161TraceFlag('ExecFetchSeq') 162TraceFlag('ExecOpClass') 163TraceFlag('ExecRegDelta') 164TraceFlag('ExecResult') 165TraceFlag('ExecSpeculative') 166TraceFlag('ExecSymbol') 167TraceFlag('ExecThread') 168TraceFlag('ExecTicks') 169TraceFlag('ExecMicro') 170TraceFlag('ExecMacro') 171TraceFlag('Fetch') 172TraceFlag('IntrControl') 173TraceFlag('PCEvent') 174TraceFlag('Quiesce') 175 176CompoundFlag('Exec', [ 'ExecEnable', 'ExecTicks', 'ExecOpClass', 'ExecThread', 177 'ExecEffAddr', 'ExecResult', 'ExecSymbol', 'ExecMicro' ]) 178