x86_traits.hh revision 9057:f5ee56466b91 
1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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36 */
37
38#ifndef __ARCH_X86_X86TRAITS_HH__
39#define __ARCH_X86_X86TRAITS_HH__
40
41#include <cassert>
42
43#include "base/types.hh"
44
45namespace X86ISA
46{
47    const int NumMicroIntRegs = 16;
48
49    const int NumPseudoIntRegs = 4;
50    //1. The condition code bits of the rflags register.
51    const int NumImplicitIntRegs = 6;
52    //1. The lower part of the result of multiplication.
53    //2. The upper part of the result of multiplication.
54    //3. The quotient from division
55    //4. The remainder from division
56    //5. The divisor for division
57    //6. The register to use for shift doubles
58
59    const int NumMMXRegs = 8;
60    const int NumXMMRegs = 16;
61    const int NumMicroFpRegs = 8;
62
63    const int NumCRegs = 16;
64    const int NumDRegs = 8;
65
66    const int NumSegments = 6;
67    const int NumSysSegments = 4;
68
69    const Addr IntAddrPrefixMask = ULL(0xffffffff00000000);
70    const Addr IntAddrPrefixCPUID = ULL(0x100000000);
71    const Addr IntAddrPrefixMSR = ULL(0x200000000);
72    const Addr IntAddrPrefixIO = ULL(0x300000000);
73
74    const Addr PhysAddrPrefixIO = ULL(0x8000000000000000);
75    const Addr PhysAddrPrefixPciConfig = ULL(0xC000000000000000);
76    const Addr PhysAddrPrefixLocalAPIC = ULL(0x2000000000000000);
77    const Addr PhysAddrPrefixInterrupts = ULL(0xA000000000000000);
78    // Each APIC gets two pages. One page is used for local apics to field
79    // accesses from the CPU, and the other is for all APICs to communicate.
80    const Addr PhysAddrAPICRangeSize = 1 << 12;
81
82    static inline Addr
83    x86IOAddress(const uint32_t port)
84    {
85        return PhysAddrPrefixIO | port;
86    }
87
88    static inline Addr
89    x86PciConfigAddress(const uint32_t addr)
90    {
91        return PhysAddrPrefixPciConfig | addr;
92    }
93
94    static inline Addr
95    x86LocalAPICAddress(const uint8_t id, const uint16_t addr)
96    {
97        assert(addr < (1 << 12));
98        return PhysAddrPrefixLocalAPIC | (id * (1 << 12)) | addr;
99    }
100
101    static inline Addr
102    x86InterruptAddress(const uint8_t id, const uint16_t addr)
103    {
104        assert(addr < PhysAddrAPICRangeSize);
105        return PhysAddrPrefixInterrupts | (id * PhysAddrAPICRangeSize) | addr;
106    }
107}
108
109#endif //__ARCH_X86_X86TRAITS_HH__
110