x86_traits.hh revision 7087
14134Sgblack@eecs.umich.edu/* 24134Sgblack@eecs.umich.edu * Copyright (c) 2007 The Hewlett-Packard Development Company 34134Sgblack@eecs.umich.edu * All rights reserved. 44134Sgblack@eecs.umich.edu * 57087Snate@binkert.org * The license below extends only to copyright in the software and shall 67087Snate@binkert.org * not be construed as granting a license to any other intellectual 77087Snate@binkert.org * property including but not limited to intellectual property relating 87087Snate@binkert.org * to a hardware implementation of the functionality of the software 97087Snate@binkert.org * licensed hereunder. You may use the software subject to the license 107087Snate@binkert.org * terms below provided that you ensure that this notice is replicated 117087Snate@binkert.org * unmodified and in its entirety in all distributions of the software, 127087Snate@binkert.org * modified or unmodified, in source code or in binary form. 134134Sgblack@eecs.umich.edu * 147087Snate@binkert.org * Redistribution and use in source and binary forms, with or without 157087Snate@binkert.org * modification, are permitted provided that the following conditions are 167087Snate@binkert.org * met: redistributions of source code must retain the above copyright 177087Snate@binkert.org * notice, this list of conditions and the following disclaimer; 187087Snate@binkert.org * redistributions in binary form must reproduce the above copyright 197087Snate@binkert.org * notice, this list of conditions and the following disclaimer in the 207087Snate@binkert.org * documentation and/or other materials provided with the distribution; 217087Snate@binkert.org * neither the name of the copyright holders nor the names of its 224134Sgblack@eecs.umich.edu * contributors may be used to endorse or promote products derived from 237087Snate@binkert.org * this software without specific prior written permission. 244134Sgblack@eecs.umich.edu * 254134Sgblack@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 264134Sgblack@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 274134Sgblack@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 284134Sgblack@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 294134Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 304134Sgblack@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 314134Sgblack@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 324134Sgblack@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 334134Sgblack@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 344134Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 354134Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 364134Sgblack@eecs.umich.edu */ 374134Sgblack@eecs.umich.edu 384134Sgblack@eecs.umich.edu#ifndef __ARCH_X86_X86TRAITS_HH__ 394134Sgblack@eecs.umich.edu#define __ARCH_X86_X86TRAITS_HH__ 404134Sgblack@eecs.umich.edu 416216Snate@binkert.org#include <cassert> 425648Sgblack@eecs.umich.edu 436214Snate@binkert.org#include "base/types.hh" 445648Sgblack@eecs.umich.edu 454134Sgblack@eecs.umich.edunamespace X86ISA 464134Sgblack@eecs.umich.edu{ 474578Sgblack@eecs.umich.edu const int NumMicroIntRegs = 16; 485063Sgblack@eecs.umich.edu 494682Sgblack@eecs.umich.edu const int NumPseudoIntRegs = 1; 505063Sgblack@eecs.umich.edu //1. The condition code bits of the rflags register. 516479Sgblack@eecs.umich.edu const int NumImplicitIntRegs = 6; 525063Sgblack@eecs.umich.edu //1. The lower part of the result of multiplication. 535063Sgblack@eecs.umich.edu //2. The upper part of the result of multiplication. 545063Sgblack@eecs.umich.edu //3. The quotient from division 555063Sgblack@eecs.umich.edu //4. The remainder from division 565075Sgblack@eecs.umich.edu //5. The divisor for division 576479Sgblack@eecs.umich.edu //6. The register to use for shift doubles 584134Sgblack@eecs.umich.edu 594134Sgblack@eecs.umich.edu const int NumMMXRegs = 8; 604134Sgblack@eecs.umich.edu const int NumXMMRegs = 16; 615045Sgblack@eecs.umich.edu const int NumMicroFpRegs = 8; 625025Sgblack@eecs.umich.edu 635025Sgblack@eecs.umich.edu const int NumCRegs = 16; 645025Sgblack@eecs.umich.edu const int NumDRegs = 8; 655025Sgblack@eecs.umich.edu 665025Sgblack@eecs.umich.edu const int NumSegments = 6; 675025Sgblack@eecs.umich.edu const int NumSysSegments = 4; 685149Sgblack@eecs.umich.edu 695149Sgblack@eecs.umich.edu const Addr IntAddrPrefixMask = ULL(0xffffffff00000000); 705149Sgblack@eecs.umich.edu const Addr IntAddrPrefixCPUID = ULL(0x100000000); 715149Sgblack@eecs.umich.edu const Addr IntAddrPrefixMSR = ULL(0x200000000); 725161Sgblack@eecs.umich.edu const Addr IntAddrPrefixIO = ULL(0x300000000); 735323Sgblack@eecs.umich.edu 745357Sgblack@eecs.umich.edu const Addr PhysAddrPrefixIO = ULL(0x8000000000000000); 755357Sgblack@eecs.umich.edu const Addr PhysAddrPrefixPciConfig = ULL(0xC000000000000000); 765658Sgblack@eecs.umich.edu const Addr PhysAddrPrefixLocalAPIC = ULL(0x2000000000000000); 775658Sgblack@eecs.umich.edu const Addr PhysAddrPrefixInterrupts = ULL(0xA000000000000000); 785648Sgblack@eecs.umich.edu // Each APIC gets two pages. One page is used for local apics to field 795648Sgblack@eecs.umich.edu // accesses from the CPU, and the other is for all APICs to communicate. 805648Sgblack@eecs.umich.edu const Addr PhysAddrAPICRangeSize = 1 << 12; 815390Sgblack@eecs.umich.edu 825390Sgblack@eecs.umich.edu static inline Addr 835390Sgblack@eecs.umich.edu x86IOAddress(const uint32_t port) 845390Sgblack@eecs.umich.edu { 855390Sgblack@eecs.umich.edu return PhysAddrPrefixIO | port; 865390Sgblack@eecs.umich.edu } 875390Sgblack@eecs.umich.edu 885390Sgblack@eecs.umich.edu static inline Addr 895390Sgblack@eecs.umich.edu x86PciConfigAddress(const uint32_t addr) 905390Sgblack@eecs.umich.edu { 915390Sgblack@eecs.umich.edu return PhysAddrPrefixPciConfig | addr; 925390Sgblack@eecs.umich.edu } 935648Sgblack@eecs.umich.edu 945648Sgblack@eecs.umich.edu static inline Addr 955648Sgblack@eecs.umich.edu x86LocalAPICAddress(const uint8_t id, const uint16_t addr) 965648Sgblack@eecs.umich.edu { 975648Sgblack@eecs.umich.edu assert(addr < (1 << 12)); 985648Sgblack@eecs.umich.edu return PhysAddrPrefixLocalAPIC | (id * (1 << 12)) | addr; 995648Sgblack@eecs.umich.edu } 1005651Sgblack@eecs.umich.edu 1015651Sgblack@eecs.umich.edu static inline Addr 1025651Sgblack@eecs.umich.edu x86InterruptAddress(const uint8_t id, const uint16_t addr) 1035651Sgblack@eecs.umich.edu { 1045651Sgblack@eecs.umich.edu assert(addr < PhysAddrAPICRangeSize); 1055651Sgblack@eecs.umich.edu return PhysAddrPrefixInterrupts | (id * PhysAddrAPICRangeSize) | addr; 1065651Sgblack@eecs.umich.edu } 1074134Sgblack@eecs.umich.edu} 1084134Sgblack@eecs.umich.edu 1094134Sgblack@eecs.umich.edu#endif //__ARCH_X86_X86TRAITS_HH__ 110