specialize.isa revision 4348
14348Sgblack@eecs.umich.edu// -*- mode:c++ -*-
24348Sgblack@eecs.umich.edu
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554348Sgblack@eecs.umich.edu//
564348Sgblack@eecs.umich.edu// Authors: Gabe Black
574348Sgblack@eecs.umich.edu
584348Sgblack@eecs.umich.edu////////////////////////////////////////////////////////////////////
594348Sgblack@eecs.umich.edu//
604348Sgblack@eecs.umich.edu//  Code to "specialize" a microcode sequence to use a particular
614348Sgblack@eecs.umich.edu//  variety of operands
624348Sgblack@eecs.umich.edu//
634348Sgblack@eecs.umich.edu
644348Sgblack@eecs.umich.edulet {{
654348Sgblack@eecs.umich.edu    # This code builds up a decode block which decodes based on switchval.
664348Sgblack@eecs.umich.edu    # vals is a dict which matches case values with what should be decoded to.
674348Sgblack@eecs.umich.edu    # builder is called on the exploded contents of "vals" values to generate
684348Sgblack@eecs.umich.edu    # whatever code should be used.
694348Sgblack@eecs.umich.edu    def doSplitDecode(name, Name, builder, switchVal, vals, default = None):
704348Sgblack@eecs.umich.edu        header_output = ''
714348Sgblack@eecs.umich.edu        decoder_output = ''
724348Sgblack@eecs.umich.edu        decode_block = 'switch(%s) {\n' % switchVal
734348Sgblack@eecs.umich.edu        exec_output = ''
744348Sgblack@eecs.umich.edu        for (val, todo) in vals.items():
754348Sgblack@eecs.umich.edu            (new_header_output,
764348Sgblack@eecs.umich.edu             new_decoder_output,
774348Sgblack@eecs.umich.edu             new_decode_block,
784348Sgblack@eecs.umich.edu             new_exec_output) = builder(name, Name, *todo)
794348Sgblack@eecs.umich.edu            header_output += new_header_output
804348Sgblack@eecs.umich.edu            decoder_output += new_decoder_output
814348Sgblack@eecs.umich.edu            decode_block += '\tcase %s: %s\n' % (val, new_decode_block)
824348Sgblack@eecs.umich.edu            exec_output += new_exec_output
834348Sgblack@eecs.umich.edu        if default:
844348Sgblack@eecs.umich.edu            (new_header_output,
854348Sgblack@eecs.umich.edu             new_decoder_output,
864348Sgblack@eecs.umich.edu             new_decode_block,
874348Sgblack@eecs.umich.edu             new_exec_output) = builder(name, Name, *default)
884348Sgblack@eecs.umich.edu            header_output += new_header_output
894348Sgblack@eecs.umich.edu            decoder_output += new_decoder_output
904348Sgblack@eecs.umich.edu            decode_block += '\tdefault: %s\n' % new_decode_block
914348Sgblack@eecs.umich.edu            exec_output += new_exec_output
924348Sgblack@eecs.umich.edu        decode_block += '}\n'
934348Sgblack@eecs.umich.edu        return (header_output, decoder_output, decode_block, exec_output)
944348Sgblack@eecs.umich.edu}};
954348Sgblack@eecs.umich.edu
964348Sgblack@eecs.umich.edulet {{
974348Sgblack@eecs.umich.edu    class OpType(object):
984348Sgblack@eecs.umich.edu        parser = re.compile(r"(?P<tag>[A-Z][A-Z]*)(?P<size>[a-z][a-z]*)|(r(?P<reg>[A-Za-z0-9][A-Za-z0-9]*))")
994348Sgblack@eecs.umich.edu        def __init__(self, opTypeString):
1004348Sgblack@eecs.umich.edu            match = OpType.parser.search(opTypeString)
1014348Sgblack@eecs.umich.edu            if match == None:
1024348Sgblack@eecs.umich.edu                raise Exception, "Problem parsing operand type %s" % opTypeString
1034348Sgblack@eecs.umich.edu            self.reg = match.group("reg")
1044348Sgblack@eecs.umich.edu            self.tag = match.group("tag")
1054348Sgblack@eecs.umich.edu            self.size = match.group("size")
1064348Sgblack@eecs.umich.edu
1074348Sgblack@eecs.umich.edu    # This function specializes the given piece of code to use a particular
1084348Sgblack@eecs.umich.edu    # set of argument types described by "opTypes". These are "implemented"
1094348Sgblack@eecs.umich.edu    # in reverse order.
1104348Sgblack@eecs.umich.edu    def specializeInst(name, Name, code, opTypes):
1114348Sgblack@eecs.umich.edu        opNum = len(opTypes) - 1
1124348Sgblack@eecs.umich.edu        while len(opTypes):
1134348Sgblack@eecs.umich.edu            # print "Building a composite op with tags", opTypes
1144348Sgblack@eecs.umich.edu            # print "And code", code
1154348Sgblack@eecs.umich.edu            opNum = len(opTypes) - 1
1164348Sgblack@eecs.umich.edu            # A regular expression to find the operand placeholders we're
1174348Sgblack@eecs.umich.edu            # interested in.
1184348Sgblack@eecs.umich.edu            opRe = re.compile("\\^(?P<operandNum>%d)(?=[^0-9]|$)" % opNum)
1194348Sgblack@eecs.umich.edu
1204348Sgblack@eecs.umich.edu            # Parse the operand type strign we're working with
1214348Sgblack@eecs.umich.edu            opType = OpType(opTypes[opNum])
1224348Sgblack@eecs.umich.edu
1234348Sgblack@eecs.umich.edu            if opType.reg:
1244348Sgblack@eecs.umich.edu                #Figure out what to do with fixed register operands
1254348Sgblack@eecs.umich.edu                if opType.reg in ("Ax", "Bx", "Cx", "Dx"):
1264348Sgblack@eecs.umich.edu                    code = opRe.sub("%%{INTREG_R%s}" % opType.reg.upper(), code)
1274348Sgblack@eecs.umich.edu                elif opType.reg == "Al":
1284348Sgblack@eecs.umich.edu                    # We need a way to specify register width
1294348Sgblack@eecs.umich.edu                    code = opRe.sub("%{INTREG_RAX}", code)
1304348Sgblack@eecs.umich.edu                else:
1314348Sgblack@eecs.umich.edu                    print "Didn't know how to encode fixed register %s!" % opType.reg
1324348Sgblack@eecs.umich.edu            elif opType.tag == None or opType.size == None:
1334348Sgblack@eecs.umich.edu                raise Exception, "Problem parsing operand tag: %s" % opType.tag
1344348Sgblack@eecs.umich.edu            elif opType.tag in ("C", "D", "G", "P", "S", "T", "V"):
1354348Sgblack@eecs.umich.edu                # Use the "reg" field of the ModRM byte to select the register
1364348Sgblack@eecs.umich.edu                code = opRe.sub("%{(uint8_t)MODRM_REG}", code)
1374348Sgblack@eecs.umich.edu            elif opType.tag in ("E", "Q", "W"):
1384348Sgblack@eecs.umich.edu                # This might refer to memory or to a register. We need to
1394348Sgblack@eecs.umich.edu                # divide it up farther.
1404348Sgblack@eecs.umich.edu                regCode = opRe.sub("%{(uint8_t)MODRM_RM}", code)
1414348Sgblack@eecs.umich.edu                regTypes = copy.copy(opTypes)
1424348Sgblack@eecs.umich.edu                regTypes.pop(-1)
1434348Sgblack@eecs.umich.edu                # This needs to refer to memory, but we'll fill in the details
1444348Sgblack@eecs.umich.edu                # later. It needs to take into account unaligned memory
1454348Sgblack@eecs.umich.edu                # addresses.
1464348Sgblack@eecs.umich.edu                memCode = opRe.sub("%0", code)
1474348Sgblack@eecs.umich.edu                memTypes = copy.copy(opTypes)
1484348Sgblack@eecs.umich.edu                memTypes.pop(-1)
1494348Sgblack@eecs.umich.edu                return doSplitDecode(name, Name, specializeInst, "MODRM_MOD",
1504348Sgblack@eecs.umich.edu                    {"3" : (regCode, regTypes)}, (memCode, memTypes))
1514348Sgblack@eecs.umich.edu            elif opType.tag in ("I", "J"):
1524348Sgblack@eecs.umich.edu                # Immediates are already in the instruction, so don't leave in
1534348Sgblack@eecs.umich.edu                # those parameters
1544348Sgblack@eecs.umich.edu                code = opRe.sub("${IMMEDIATE}", code)
1554348Sgblack@eecs.umich.edu            elif opType.tag == "M":
1564348Sgblack@eecs.umich.edu                # This needs to refer to memory, but we'll fill in the details
1574348Sgblack@eecs.umich.edu                # later. It needs to take into account unaligned memory
1584348Sgblack@eecs.umich.edu                # addresses.
1594348Sgblack@eecs.umich.edu                code = opRe.sub("%0", code)
1604348Sgblack@eecs.umich.edu            elif opType.tag in ("PR", "R", "VR"):
1614348Sgblack@eecs.umich.edu                # There should probably be a check here to verify that mod
1624348Sgblack@eecs.umich.edu                # is equal to 11b
1634348Sgblack@eecs.umich.edu                code = opRe.sub("%{(uint8_t)MODRM_RM}", code)
1644348Sgblack@eecs.umich.edu            else:
1654348Sgblack@eecs.umich.edu                raise Exception, "Unrecognized tag %s." % opType.tag
1664348Sgblack@eecs.umich.edu            opTypes.pop(-1)
1674348Sgblack@eecs.umich.edu
1684348Sgblack@eecs.umich.edu        # At this point, we've built up "code" to have all the necessary extra
1694348Sgblack@eecs.umich.edu        # instructions needed to implement whatever types of operands were
1704348Sgblack@eecs.umich.edu        # specified. Now we'll assemble it it into a StaticInst.
1714348Sgblack@eecs.umich.edu        return assembleMicro(name, Name, code)
1724348Sgblack@eecs.umich.edu}};
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