specialize.isa revision 4348
1// -*- mode:c++ -*- 2 3// Copyright (c) 2007 The Hewlett-Packard Development Company 4// All rights reserved. 5// 6// Redistribution and use of this software in source and binary forms, 7// with or without modification, are permitted provided that the 8// following conditions are met: 9// 10// The software must be used only for Non-Commercial Use which means any 11// use which is NOT directed to receiving any direct monetary 12// compensation for, or commercial advantage from such use. Illustrative 13// examples of non-commercial use are academic research, personal study, 14// teaching, education and corporate research & development. 15// Illustrative examples of commercial use are distributing products for 16// commercial advantage and providing services using the software for 17// commercial advantage. 18// 19// If you wish to use this software or functionality therein that may be 20// covered by patents for commercial use, please contact: 21// Director of Intellectual Property Licensing 22// Office of Strategy and Technology 23// Hewlett-Packard Company 24// 1501 Page Mill Road 25// Palo Alto, California 94304 26// 27// Redistributions of source code must retain the above copyright notice, 28// this list of conditions and the following disclaimer. Redistributions 29// in binary form must reproduce the above copyright notice, this list of 30// conditions and the following disclaimer in the documentation and/or 31// other materials provided with the distribution. Neither the name of 32// the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its 33// contributors may be used to endorse or promote products derived from 34// this software without specific prior written permission. No right of 35// sublicense is granted herewith. Derivatives of the software and 36// output created using the software may be prepared, but only for 37// Non-Commercial Uses. Derivatives of the software may be shared with 38// others provided: (i) the others agree to abide by the list of 39// conditions herein which includes the Non-Commercial Use restrictions; 40// and (ii) such Derivatives of the software include the above copyright 41// notice to acknowledge the contribution from this software where 42// applicable, this list of conditions and the disclaimer below. 43// 44// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 45// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 46// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 47// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 48// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 49// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 50// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 51// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 52// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 53// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 54// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 55// 56// Authors: Gabe Black 57 58//////////////////////////////////////////////////////////////////// 59// 60// Code to "specialize" a microcode sequence to use a particular 61// variety of operands 62// 63 64let {{ 65 # This code builds up a decode block which decodes based on switchval. 66 # vals is a dict which matches case values with what should be decoded to. 67 # builder is called on the exploded contents of "vals" values to generate 68 # whatever code should be used. 69 def doSplitDecode(name, Name, builder, switchVal, vals, default = None): 70 header_output = '' 71 decoder_output = '' 72 decode_block = 'switch(%s) {\n' % switchVal 73 exec_output = '' 74 for (val, todo) in vals.items(): 75 (new_header_output, 76 new_decoder_output, 77 new_decode_block, 78 new_exec_output) = builder(name, Name, *todo) 79 header_output += new_header_output 80 decoder_output += new_decoder_output 81 decode_block += '\tcase %s: %s\n' % (val, new_decode_block) 82 exec_output += new_exec_output 83 if default: 84 (new_header_output, 85 new_decoder_output, 86 new_decode_block, 87 new_exec_output) = builder(name, Name, *default) 88 header_output += new_header_output 89 decoder_output += new_decoder_output 90 decode_block += '\tdefault: %s\n' % new_decode_block 91 exec_output += new_exec_output 92 decode_block += '}\n' 93 return (header_output, decoder_output, decode_block, exec_output) 94}}; 95 96let {{ 97 class OpType(object): 98 parser = re.compile(r"(?P<tag>[A-Z][A-Z]*)(?P<size>[a-z][a-z]*)|(r(?P<reg>[A-Za-z0-9][A-Za-z0-9]*))") 99 def __init__(self, opTypeString): 100 match = OpType.parser.search(opTypeString) 101 if match == None: 102 raise Exception, "Problem parsing operand type %s" % opTypeString 103 self.reg = match.group("reg") 104 self.tag = match.group("tag") 105 self.size = match.group("size") 106 107 # This function specializes the given piece of code to use a particular 108 # set of argument types described by "opTypes". These are "implemented" 109 # in reverse order. 110 def specializeInst(name, Name, code, opTypes): 111 opNum = len(opTypes) - 1 112 while len(opTypes): 113 # print "Building a composite op with tags", opTypes 114 # print "And code", code 115 opNum = len(opTypes) - 1 116 # A regular expression to find the operand placeholders we're 117 # interested in. 118 opRe = re.compile("\\^(?P<operandNum>%d)(?=[^0-9]|$)" % opNum) 119 120 # Parse the operand type strign we're working with 121 opType = OpType(opTypes[opNum]) 122 123 if opType.reg: 124 #Figure out what to do with fixed register operands 125 if opType.reg in ("Ax", "Bx", "Cx", "Dx"): 126 code = opRe.sub("%%{INTREG_R%s}" % opType.reg.upper(), code) 127 elif opType.reg == "Al": 128 # We need a way to specify register width 129 code = opRe.sub("%{INTREG_RAX}", code) 130 else: 131 print "Didn't know how to encode fixed register %s!" % opType.reg 132 elif opType.tag == None or opType.size == None: 133 raise Exception, "Problem parsing operand tag: %s" % opType.tag 134 elif opType.tag in ("C", "D", "G", "P", "S", "T", "V"): 135 # Use the "reg" field of the ModRM byte to select the register 136 code = opRe.sub("%{(uint8_t)MODRM_REG}", code) 137 elif opType.tag in ("E", "Q", "W"): 138 # This might refer to memory or to a register. We need to 139 # divide it up farther. 140 regCode = opRe.sub("%{(uint8_t)MODRM_RM}", code) 141 regTypes = copy.copy(opTypes) 142 regTypes.pop(-1) 143 # This needs to refer to memory, but we'll fill in the details 144 # later. It needs to take into account unaligned memory 145 # addresses. 146 memCode = opRe.sub("%0", code) 147 memTypes = copy.copy(opTypes) 148 memTypes.pop(-1) 149 return doSplitDecode(name, Name, specializeInst, "MODRM_MOD", 150 {"3" : (regCode, regTypes)}, (memCode, memTypes)) 151 elif opType.tag in ("I", "J"): 152 # Immediates are already in the instruction, so don't leave in 153 # those parameters 154 code = opRe.sub("${IMMEDIATE}", code) 155 elif opType.tag == "M": 156 # This needs to refer to memory, but we'll fill in the details 157 # later. It needs to take into account unaligned memory 158 # addresses. 159 code = opRe.sub("%0", code) 160 elif opType.tag in ("PR", "R", "VR"): 161 # There should probably be a check here to verify that mod 162 # is equal to 11b 163 code = opRe.sub("%{(uint8_t)MODRM_RM}", code) 164 else: 165 raise Exception, "Unrecognized tag %s." % opType.tag 166 opTypes.pop(-1) 167 168 # At this point, we've built up "code" to have all the necessary extra 169 # instructions needed to implement whatever types of operands were 170 # specified. Now we'll assemble it it into a StaticInst. 171 return assembleMicro(name, Name, code) 172}}; 173