1# Copyright (c) 2007-2008 The Hewlett-Packard Development Company
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder.  You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated
10# unmodified and in its entirety in all distributions of the software,
11# modified or unmodified, in source code or in binary form.
12#
13# Copyright (c) 2008 The Regents of The University of Michigan
14# All rights reserved.
15#
16# Redistribution and use in source and binary forms, with or without
17# modification, are permitted provided that the following conditions are
18# met: redistributions of source code must retain the above copyright
19# notice, this list of conditions and the following disclaimer;
20# redistributions in binary form must reproduce the above copyright
21# notice, this list of conditions and the following disclaimer in the
22# documentation and/or other materials provided with the distribution;
23# neither the name of the copyright holders nor the names of its
24# contributors may be used to endorse or promote products derived from
25# this software without specific prior written permission.
26#
27# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
30# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
31# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
32# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
33# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
34# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
35# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
36# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
37# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38#
39# Authors: Gabe Black
40
41microcode = '''
42def macroop BSR_R_R {
43    # Determine if the input was zero, and also move it to a temp reg.
44    mov t1, t1, t0, dataSize=8
45    and t1, regm, regm, flags=(ZF,)
46    br label("end"), flags=(CZF,)
47
48    # Zero out the result register
49    movi reg, reg, 0x0
50
51    # Bit 6
52    srli t3, t1, 32, dataSize=8, flags=(EZF,)
53    ori t4, reg, 0x20
54    mov reg, reg, t4, flags=(nCEZF,)
55    mov t1, t1, t3, flags=(nCEZF,)
56
57    # Bit 5
58    srli t3, t1, 16, dataSize=8, flags=(EZF,)
59    ori t4, reg, 0x10
60    mov reg, reg, t4, flags=(nCEZF,)
61    mov t1, t1, t3, flags=(nCEZF,)
62
63    # Bit 4
64    srli t3, t1, 8, dataSize=8, flags=(EZF,)
65    ori t4, reg, 0x8
66    mov reg, reg, t4, flags=(nCEZF,)
67    mov t1, t1, t3, flags=(nCEZF,)
68
69    # Bit 3
70    srli t3, t1, 4, dataSize=8, flags=(EZF,)
71    ori t4, reg, 0x4
72    mov reg, reg, t4, flags=(nCEZF,)
73    mov t1, t1, t3, flags=(nCEZF,)
74
75    # Bit 2
76    srli t3, t1, 2, dataSize=8, flags=(EZF,)
77    ori t4, reg, 0x2
78    mov reg, reg, t4, flags=(nCEZF,)
79    mov t1, t1, t3, flags=(nCEZF,)
80
81    # Bit 1
82    srli t3, t1, 1, dataSize=8, flags=(EZF,)
83    ori t4, reg, 0x1
84    mov reg, reg, t4, flags=(nCEZF,)
85
86end:
87    fault "NoFault"
88};
89
90def macroop BSR_R_M {
91
92    mov t1, t1, t0, dataSize=8
93    ld t1, seg, sib, disp
94
95    # Determine if the input was zero, and also move it to a temp reg.
96    and t1, t1, t1, flags=(ZF,)
97    br label("end"), flags=(CZF,)
98
99    # Zero out the result register
100    movi reg, reg, 0x0
101
102    # Bit 6
103    srli t3, t1, 32, dataSize=8, flags=(EZF,)
104    ori t4, reg, 0x20
105    mov reg, reg, t4, flags=(nCEZF,)
106    mov t1, t1, t3, flags=(nCEZF,)
107
108    # Bit 5
109    srli t3, t1, 16, dataSize=8, flags=(EZF,)
110    ori t4, reg, 0x10
111    mov reg, reg, t4, flags=(nCEZF,)
112    mov t1, t1, t3, flags=(nCEZF,)
113
114    # Bit 4
115    srli t3, t1, 8, dataSize=8, flags=(EZF,)
116    ori t4, reg, 0x8
117    mov reg, reg, t4, flags=(nCEZF,)
118    mov t1, t1, t3, flags=(nCEZF,)
119
120    # Bit 3
121    srli t3, t1, 4, dataSize=8, flags=(EZF,)
122    ori t4, reg, 0x4
123    mov reg, reg, t4, flags=(nCEZF,)
124    mov t1, t1, t3, flags=(nCEZF,)
125
126    # Bit 2
127    srli t3, t1, 2, dataSize=8, flags=(EZF,)
128    ori t4, reg, 0x2
129    mov reg, reg, t4, flags=(nCEZF,)
130    mov t1, t1, t3, flags=(nCEZF,)
131
132    # Bit 1
133    srli t3, t1, 1, dataSize=8, flags=(EZF,)
134    ori t4, reg, 0x1
135    mov reg, reg, t4, flags=(nCEZF,)
136
137end:
138    fault "NoFault"
139};
140
141def macroop BSR_R_P {
142
143    rdip t7
144    mov t1, t1, t0, dataSize=8
145    ld t1, seg, riprel, disp
146
147    # Determine if the input was zero, and also move it to a temp reg.
148    and t1, t1, t1, flags=(ZF,)
149    br label("end"), flags=(CZF,)
150
151    # Zero out the result register
152    movi reg, reg, 0x0
153
154    # Bit 6
155    srli t3, t1, 32, dataSize=8, flags=(EZF,)
156    ori t4, reg, 0x20
157    mov reg, reg, t4, flags=(nCEZF,)
158    mov t1, t1, t3, flags=(nCEZF,)
159
160    # Bit 5
161    srli t3, t1, 16, dataSize=8, flags=(EZF,)
162    ori t4, reg, 0x10
163    mov reg, reg, t4, flags=(nCEZF,)
164    mov t1, t1, t3, flags=(nCEZF,)
165
166    # Bit 4
167    srli t3, t1, 8, dataSize=8, flags=(EZF,)
168    ori t4, reg, 0x8
169    mov reg, reg, t4, flags=(nCEZF,)
170    mov t1, t1, t3, flags=(nCEZF,)
171
172    # Bit 3
173    srli t3, t1, 4, dataSize=8, flags=(EZF,)
174    ori t4, reg, 0x4
175    mov reg, reg, t4, flags=(nCEZF,)
176    mov t1, t1, t3, flags=(nCEZF,)
177
178    # Bit 2
179    srli t3, t1, 2, dataSize=8, flags=(EZF,)
180    ori t4, reg, 0x2
181    mov reg, reg, t4, flags=(nCEZF,)
182    mov t1, t1, t3, flags=(nCEZF,)
183
184    # Bit 1
185    srli t3, t1, 1, dataSize=8, flags=(EZF,)
186    ori t4, reg, 0x1
187    mov reg, reg, t4, flags=(nCEZF,)
188
189end:
190    fault "NoFault"
191};
192
193def macroop BSF_R_R {
194    # Determine if the input was zero, and also move it to a temp reg.
195    mov t1, t1, t0, dataSize=8
196    and t1, regm, regm, flags=(ZF,)
197    br label("end"), flags=(CZF,)
198
199    # Zero out the result register
200    movi reg, reg, 0
201
202    subi t2, t1, 1
203    xor t1, t2, t1
204
205
206    # Bit 6
207    srli t3, t1, 32, dataSize=8, flags=(EZF,)
208    ori t4, reg, 32
209    mov reg, reg, t4, flags=(nCEZF,)
210    mov t1, t1, t3, flags=(nCEZF,)
211
212    # Bit 5
213    srli t3, t1, 16, dataSize=8, flags=(EZF,)
214    ori t4, reg, 16
215    mov reg, reg, t4, flags=(nCEZF,)
216    mov t1, t1, t3, flags=(nCEZF,)
217
218    # Bit 4
219    srli t3, t1, 8, dataSize=8, flags=(EZF,)
220    ori t4, reg, 8
221    mov reg, reg, t4, flags=(nCEZF,)
222    mov t1, t1, t3, flags=(nCEZF,)
223
224    # Bit 3
225    srli t3, t1, 4, dataSize=8, flags=(EZF,)
226    ori t4, reg, 4
227    mov reg, reg, t4, flags=(nCEZF,)
228    mov t1, t1, t3, flags=(nCEZF,)
229
230    # Bit 2
231    srli t3, t1, 2, dataSize=8, flags=(EZF,)
232    ori t4, reg, 2
233    mov reg, reg, t4, flags=(nCEZF,)
234    mov t1, t1, t3, flags=(nCEZF,)
235
236    # Bit 1
237    srli t3, t1, 1, dataSize=8, flags=(EZF,)
238    ori t4, reg, 1
239    mov reg, reg, t4, flags=(nCEZF,)
240
241end:
242    fault "NoFault"
243};
244
245def macroop BSF_R_M {
246
247    mov t1, t1, t0, dataSize=8
248    ld t1, seg, sib, disp
249
250    # Determine if the input was zero, and also move it to a temp reg.
251    and t1, t1, t1, flags=(ZF,)
252    br label("end"), flags=(CZF,)
253
254    # Zero out the result register
255    mov reg, reg, t0
256
257    subi t2, t1, 1
258    xor t1, t2, t1
259
260    # Bit 6
261    srli t3, t1, 32, dataSize=8, flags=(EZF,)
262    ori t4, reg, 32
263    mov reg, reg, t4, flags=(nCEZF,)
264    mov t1, t1, t3, flags=(nCEZF,)
265
266    # Bit 5
267    srli t3, t1, 16, dataSize=8, flags=(EZF,)
268    ori t4, reg, 16
269    mov reg, reg, t4, flags=(nCEZF,)
270    mov t1, t1, t3, flags=(nCEZF,)
271
272    # Bit 4
273    srli t3, t1, 8, dataSize=8, flags=(EZF,)
274    ori t4, reg, 8
275    mov reg, reg, t4, flags=(nCEZF,)
276    mov t1, t1, t3, flags=(nCEZF,)
277
278    # Bit 3
279    srli t3, t1, 4, dataSize=8, flags=(EZF,)
280    ori t4, reg, 4
281    mov reg, reg, t4, flags=(nCEZF,)
282    mov t1, t1, t3, flags=(nCEZF,)
283
284    # Bit 2
285    srli t3, t1, 2, dataSize=8, flags=(EZF,)
286    ori t4, reg, 2
287    mov reg, reg, t4, flags=(nCEZF,)
288    mov t1, t1, t3, flags=(nCEZF,)
289
290    # Bit 1
291    srli t3, t1, 1, dataSize=8, flags=(EZF,)
292    ori t4, reg, 1
293    mov reg, reg, t4, flags=(nCEZF,)
294    mov t1, t1, t3, flags=(nCEZF,)
295
296end:
297    fault "NoFault"
298};
299
300def macroop BSF_R_P {
301
302    rdip t7
303    mov t1, t1, t0, dataSize=8
304    ld t1, seg, riprel, disp
305
306    # Determine if the input was zero, and also move it to a temp reg.
307    and t1, t1, t1, flags=(ZF,)
308    br label("end"), flags=(CZF,)
309
310    # Zero out the result register
311    mov reg, reg, t0
312
313    subi t2, t1, 1
314    xor t1, t2, t1
315
316    # Bit 6
317    srli t3, t1, 32, dataSize=8, flags=(EZF,)
318    ori t4, reg, 32
319    mov reg, reg, t4, flags=(nCEZF,)
320    mov t1, t1, t3, flags=(nCEZF,)
321
322    # Bit 5
323    srli t3, t1, 16, dataSize=8, flags=(EZF,)
324    ori t4, reg, 16
325    mov reg, reg, t4, flags=(nCEZF,)
326    mov t1, t1, t3, flags=(nCEZF,)
327
328    # Bit 4
329    srli t3, t1, 8, dataSize=8, flags=(EZF,)
330    ori t4, reg, 8
331    mov reg, reg, t4, flags=(nCEZF,)
332    mov t1, t1, t3, flags=(nCEZF,)
333
334    # Bit 3
335    srli t3, t1, 4, dataSize=8, flags=(EZF,)
336    ori t4, reg, 4
337    mov reg, reg, t4, flags=(nCEZF,)
338    mov t1, t1, t3, flags=(nCEZF,)
339
340    # Bit 2
341    srli t3, t1, 2, dataSize=8, flags=(EZF,)
342    ori t4, reg, 2
343    mov reg, reg, t4, flags=(nCEZF,)
344    mov t1, t1, t3, flags=(nCEZF,)
345
346    # Bit 1
347    srli t3, t1, 1, dataSize=8, flags=(EZF,)
348    ori t4, reg, 1
349    mov reg, reg, t4, flags=(nCEZF,)
350    mov t1, t1, t3, flags=(nCEZF,)
351
352end:
353    fault "NoFault"
354};
355'''
356