cache_and_memory_management.py revision 7087 
1# Copyright (c) 2007 The Hewlett-Packard Development Company
2# All rights reserved.
3#
4# The license below extends only to copyright in the software and shall
5# not be construed as granting a license to any other intellectual
6# property including but not limited to intellectual property relating
7# to a hardware implementation of the functionality of the software
8# licensed hereunder.  You may use the software subject to the license
9# terms below provided that you ensure that this notice is replicated
10# unmodified and in its entirety in all distributions of the software,
11# modified or unmodified, in source code or in binary form.
12#
13# Redistribution and use in source and binary forms, with or without
14# modification, are permitted provided that the following conditions are
15# met: redistributions of source code must retain the above copyright
16# notice, this list of conditions and the following disclaimer;
17# redistributions in binary form must reproduce the above copyright
18# notice, this list of conditions and the following disclaimer in the
19# documentation and/or other materials provided with the distribution;
20# neither the name of the copyright holders nor the names of its
21# contributors may be used to endorse or promote products derived from
22# this software without specific prior written permission.
23#
24# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
25# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
26# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
27# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
28# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
29# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
30# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
31# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
32# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
33# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
34# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35#
36# Authors: Gabe Black
37
38microcode = '''
39def macroop PREFETCH_M
40{
41    ld t0, seg, sib, disp, dataSize=1, prefetch=True
42};
43
44def macroop PREFETCH_P
45{
46    rdip t7
47    ld t0, seg, riprel, disp, dataSize=1, prefetch=True
48};
49
50def macroop PREFETCH_T0_M
51{
52    ld t0, seg, sib, disp, dataSize=1, prefetch=True
53};
54
55def macroop PREFETCH_T0_P
56{
57    rdip t7
58    ld t0, seg, riprel, disp, dataSize=1, prefetch=True
59};
60
61'''
62
63#let {{
64#    class LFENCE(Inst):
65#       "GenFault ${new UnimpInstFault}"
66#    class SFENCE(Inst):
67#       "GenFault ${new UnimpInstFault}"
68#    class MFENCE(Inst):
69#       "GenFault ${new UnimpInstFault}"
70#    class PREFETCHlevel(Inst):
71#       "GenFault ${new UnimpInstFault}"
72#    class PREFETCHW(Inst):
73#       "GenFault ${new UnimpInstFault}"
74#    class CLFLUSH(Inst):
75#       "GenFault ${new UnimpInstFault}"
76#}};
77