two_byte_opcodes.isa revision 5815:18ed7aa8e8e1
1// Copyright (c) 2008 The Regents of The University of Michigan 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are 6// met: redistributions of source code must retain the above copyright 7// notice, this list of conditions and the following disclaimer; 8// redistributions in binary form must reproduce the above copyright 9// notice, this list of conditions and the following disclaimer in the 10// documentation and/or other materials provided with the distribution; 11// neither the name of the copyright holders nor the names of its 12// contributors may be used to endorse or promote products derived from 13// this software without specific prior written permission. 14// 15// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 16// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 17// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 18// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 19// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 20// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 21// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 25// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26// 27// Authors: Gabe Black 28 29// Copyright (c) 2007-2008 The Hewlett-Packard Development Company 30// All rights reserved. 31// 32// Redistribution and use of this software in source and binary forms, 33// with or without modification, are permitted provided that the 34// following conditions are met: 35// 36// The software must be used only for Non-Commercial Use which means any 37// use which is NOT directed to receiving any direct monetary 38// compensation for, or commercial advantage from such use. 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Neither the name of 58// the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its 59// contributors may be used to endorse or promote products derived from 60// this software without specific prior written permission. No right of 61// sublicense is granted herewith. Derivatives of the software and 62// output created using the software may be prepared, but only for 63// Non-Commercial Uses. Derivatives of the software may be shared with 64// others provided: (i) the others agree to abide by the list of 65// conditions herein which includes the Non-Commercial Use restrictions; 66// and (ii) such Derivatives of the software include the above copyright 67// notice to acknowledge the contribution from this software where 68// applicable, this list of conditions and the disclaimer below. 69// 70// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 71// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 72// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 73// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 74// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 75// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 76// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 77// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 78// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 79// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 80// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 81// 82// Authors: Gabe Black 83 84//////////////////////////////////////////////////////////////////// 85// 86// Decode the two byte opcodes 87// 880x2: decode OPCODE_PREFIXA { 89 0x0F: decode OPCODE_OP_TOP5 { 90 format WarnUnimpl { 91 0x00: decode OPCODE_OP_BOTTOM3 { 92 //0x00: group6(); 93 0x00: decode MODRM_REG { 94 0x0: sldt_Mw_or_Rv(); 95 0x1: str_Mw_or_Rv(); 96 0x2: lldt_Mw_or_Rv(); 97 0x3: ltr_Mw_or_Rv(); 98 0x4: verr_Mw_or_Rv(); 99 0x5: verw_Mw_or_Rv(); 100 //0x6: jmpe_Ev(); // IA-64 101 default: Inst::UD2(); 102 } 103 //0x01: group7(); // Ugly, ugly, ugly... 104 0x01: decode MODRM_MOD { 105 0x3: decode MODRM_REG { 106 0x0: decode MODRM_RM { 107 0x1: vmcall(); 108 0x2: vmlaunch(); 109 0x3: vmresume(); 110 0x4: vmxoff(); 111 default: Inst::UD2(); 112 } 113 0x1: decode MODRM_RM { 114 0x0: monitor(); 115 0x1: mwait(); 116 default: Inst::UD2(); 117 } 118 0x3: decode MODRM_RM { 119 0x0: vmrun(); 120 0x1: vmmcall(); 121 0x2: vmload(); 122 0x3: vmsave(); 123 0x4: stgi(); 124 0x5: clgi(); 125 0x6: skinit(); 126 0x7: invlpga(); 127 } 128 0x4: smsw_Rv(); 129 0x6: lmsw_Rv(); 130 0x7: decode MODRM_RM { 131 0x0: Inst::SWAPGS(); 132 0x1: rdtscp(); 133 default: Inst::UD2(); 134 } 135 default: Inst::UD2(); 136 } 137 default: decode MODRM_REG { 138 0x0: sgdt_Ms(); 139 0x1: sidt_Ms(); 140 0x2: decode MODE_SUBMODE { 141 0x0: Inst::LGDT(M); 142 default: decode OPSIZE { 143 // 16 bit operand sizes are special, but only 144 // in legacy and compatability modes. 145 0x2: Inst::LGDT_16(M); 146 default: Inst::LGDT(M); 147 } 148 } 149 0x3: decode MODE_SUBMODE { 150 0x0: Inst::LIDT(M); 151 default: decode OPSIZE { 152 // 16 bit operand sizes are special, but only 153 // in legacy and compatability modes. 154 0x2: Inst::LIDT_16(M); 155 default: Inst::LIDT(M); 156 } 157 } 158 0x4: smsw_Mw(); 159 0x6: lmsw_Mw(); 160 0x7: Inst::INVLPG(M); 161 default: Inst::UD2(); 162 } 163 } 164 0x02: lar_Gv_Ew(); 165 0x03: lsl_Gv_Ew(); 166 // sandpile.org doesn't seem to know what this is...? We'll 167 // use it for pseudo instructions. We've got 16 bits of space 168 // to play with so there can be quite a few pseudo 169 // instructions. 170 //0x04: loadall_or_reset_or_hang(); 171 0x4: decode IMMEDIATE { 172 format BasicOperate { 173#if FULL_SYSTEM 174 0x00: m5arm({{ 175 PseudoInst::arm(xc->tcBase()); 176 }}, IsNonSpeculative); 177 0x01: m5quiesce({{ 178 PseudoInst::quiesce(xc->tcBase()); 179 }}, IsNonSpeculative); 180 0x02: m5quiesceNs({{ 181 PseudoInst::quiesceNs(xc->tcBase(), Rdi); 182 }}, IsNonSpeculative); 183 0x03: m5quiesceCycle({{ 184 PseudoInst::quiesceCycles(xc->tcBase(), Rdi); 185 }}, IsNonSpeculative); 186 0x04: m5quiesceTime({{ 187 Rax = PseudoInst::quiesceTime(xc->tcBase()); 188 }}, IsNonSpeculative); 189#endif 190 0x07: m5rpns({{ 191 Rax = PseudoInst::rpns(xc->tcBase()); 192 }}, IsNonSpeculative); 193 0x21: m5exit({{ 194 PseudoInst::m5exit(xc->tcBase(), Rdi); 195 }}, IsNonSpeculative); 196#if FULL_SYSTEM 197 0x30: m5initparam({{ 198 Rax = xc->tcBase()->getCpuPtr()-> 199 system->init_param; 200 }}, IsNonSpeculative); 201 0x31: m5loadsymbol({{ 202 PseudoInst::loadsymbol(xc->tcBase()); 203 }}, IsNonSpeculative); 204#endif 205 0x40: m5resetstats({{ 206 PseudoInst::resetstats(xc->tcBase(), Rdi, Rsi); 207 }}, IsNonSpeculative); 208 0x41: m5dumpstats({{ 209 PseudoInst::dumpstats(xc->tcBase(), Rdi, Rsi); 210 }}, IsNonSpeculative); 211 0x42: m5dumpresetstats({{ 212 PseudoInst::dumpresetstats(xc->tcBase(), Rdi, Rsi); 213 }}, IsNonSpeculative); 214 0x43: m5checkpoint({{ 215 PseudoInst::m5checkpoint(xc->tcBase(), Rdi, Rsi); 216 }}, IsNonSpeculative); 217#if FULL_SYSTEM 218 0x50: m5readfile({{ 219 Rax = PseudoInst::readfile( 220 xc->tcBase(), Rdi, Rsi, Rdx); 221 }}, IsNonSpeculative); 222#endif 223 0x51: m5debugbreak({{ 224 PseudoInst::debugbreak(xc->tcBase()); 225 }}, IsNonSpeculative); 226 0x52: m5switchcpu({{ 227 PseudoInst::switchcpu(xc->tcBase()); 228 }}, IsNonSpeculative); 229#if FULL_SYSTEM 230 0x53: m5addsymbol({{ 231 PseudoInst::addsymbol(xc->tcBase(), Rdi, Rsi); 232 }}, IsNonSpeculative); 233#endif 234 0x54: m5panic({{ 235 panic("M5 panic instruction called at pc=%#x.\n", 236 xc->readPC()); 237 }}, IsNonSpeculative); 238 0x55: m5reserved1({{ 239 warn("M5 reserved opcode 1 ignored.\n"); 240 }}, IsNonSpeculative); 241 0x56: m5reserved2({{ 242 warn("M5 reserved opcode 2 ignored.\n"); 243 }}, IsNonSpeculative); 244 0x57: m5reserved3({{ 245 warn("M5 reserved opcode 3 ignored.\n"); 246 }}, IsNonSpeculative); 247 0x58: m5reserved4({{ 248 warn("M5 reserved opcode 4 ignored.\n"); 249 }}, IsNonSpeculative); 250 0x59: m5reserved5({{ 251 warn("M5 reserved opcode 5 ignored.\n"); 252 }}, IsNonSpeculative); 253 default: Inst::UD2(); 254 } 255 } 256#if FULL_SYSTEM 257 0x05: syscall(); 258#else 259 0x05: SyscallInst::syscall('xc->syscall(Rax)', IsSyscall); 260#endif 261 0x06: clts(); 262 //sandpile.org says (AMD) after sysret, so I might want to check 263 //if that means amd64 or AMD machines 264 0x07: loadall_or_sysret(); 265 } 266 0x01: decode OPCODE_OP_BOTTOM3 { 267 0x0: invd(); 268 0x1: wbinvd(); 269 0x2: Inst::UD2(); 270 0x3: Inst::UD2(); 271 0x4: Inst::UD2(); 272 0x5: prefetch(); 273 0x6: FailUnimpl::femms(); 274 0x7: FailUnimpl::threednow(); 275 } 276 0x02: decode LEGACY_DECODEVAL { 277 // no prefix 278 0x0: decode OPCODE_OP_BOTTOM3 { 279 0x0: movups_Vo_Wo(); 280 0x1: movups_Wo_Vo(); 281 0x2: decode MODRM_MOD { 282 0x3: movhlps_Vq_VRq(); 283 default: movlps_Vq_Mq(); 284 } 285 0x3: movlps_Mq_Vq(); 286 0x4: unpcklps(); 287 0x5: unpckhps(); 288 0x6: decode MODRM_MOD { 289 0x3: movlhps_Vq_VRq(); 290 default: movhps_Vq_Mq(); 291 } 292 0x7: movhps_Mq_Vq(); 293 } 294 // repe (0xF3) 295 0x4: decode OPCODE_OP_BOTTOM3 { 296 0x0: movss_Vd_Wd(); 297 0x1: movss_Wd_Vd(); 298 0x2: movsldup_Vo_Wo(); 299 0x6: movshdup_Vo_Wo(); 300 default: Inst::UD2(); 301 } 302 // operand size (0x66) 303 0x1: decode OPCODE_OP_BOTTOM3 { 304 0x0: movupd_Vo_Wo(); 305 0x1: movupd_Wo_Vo(); 306 0x2: Inst::MOVLPD(Vq,Mq); 307 0x3: Inst::MOVLPD(Mq,Vq); 308 0x4: unpcklpd_Vo_Wq(); 309 0x5: unpckhpd_Vo_Wo(); 310 0x6: movhpd_Vq_Mq(); 311 0x7: movhpd_Mq_Vq(); 312 } 313 // repne (0xF2) 314 0x8: decode OPCODE_OP_BOTTOM3 { 315 0x0: Inst::MOVSD(Vq,Wq); 316 0x1: Inst::MOVSD(Wq,Vq); 317 0x2: movddup_Vo_Wq(); 318 default: Inst::UD2(); 319 } 320 default: Inst::UD2(); 321 } 322 0x03: decode OPCODE_OP_BOTTOM3 { 323 //group17(); 324 0x0: decode MODRM_REG { 325 0x0: prefetch_nta(); 326 0x1: prefetch_t0(); 327 0x2: prefetch_t1(); 328 0x3: prefetch_t2(); 329 default: Inst::HINT_NOP(); 330 } 331 0x1: Inst::HINT_NOP(); 332 0x2: Inst::HINT_NOP(); 333 0x3: Inst::HINT_NOP(); 334 0x4: Inst::HINT_NOP(); 335 0x5: Inst::HINT_NOP(); 336 0x6: Inst::HINT_NOP(); 337 0x7: Inst::HINT_NOP(); 338 } 339 0x04: decode LEGACY_DECODEVAL { 340 // no prefix 341 0x0: decode OPCODE_OP_BOTTOM3 { 342 0x0: Inst::MOV(Rd,Cd); 343 0x1: mov_Rd_Dd(); 344 0x2: Inst::MOV(Cd,Rd); 345 0x3: mov_Dd_Rd(); 346 0x4: mov_Rd_Td(); 347 0x6: mov_Td_Rd(); 348 default: Inst::UD2(); 349 } 350 // lock prefix (0xF0) 351 0x2: decode OPCODE_OP_BOTTOM3 { 352 0x0: mov_Rd_CR8D(); 353 0x2: mov_CR8D_Rd(); 354 } 355 default: Inst::UD2(); 356 } 357 0x05: decode LEGACY_DECODEVAL { 358 // no prefix 359 0x0: decode OPCODE_OP_BOTTOM3 { 360 //These moves should really use size o (octword), but 361 //because they are split in two, they use q (quadword). 362 0x0: Inst::MOVAPS(Vq,Wq); 363 0x1: Inst::MOVAPS(Wq,Vq); 364 0x2: decode MODRM_MOD { 365 0x3: cvtpi2pS_Vq_Pq(); 366 default: cvtpi2ps_Vq_Mq(); 367 } 368 0x3: movntps_Mo_Vo(); 369 0x4: cvttps2pi_Pq_Wq(); 370 0x5: cvtpS2pi_Pq_Wq(); 371 0x6: ucomiss_Vd_Wd(); 372 0x7: comiss_Vd_Wd(); 373 } 374 // repe (0xF3) 375 0x4: decode OPCODE_OP_BOTTOM3 { 376 0x2: cvtsi2ss_Vd_Ed(); 377 0x4: cvttss2si_Gd_Wd(); 378 0x5: cvtss2si_Gd_Wd(); 379 default: Inst::UD2(); 380 } 381 // operand size (0x66) 382 0x1: decode OPCODE_OP_BOTTOM3 { 383 0x0: movapd_Vo_Wo(); 384 0x1: movapd_Wo_Vo(); 385 0x2: decode MODRM_MOD { 386 0x3: cvtpi2pd_Vo_Pq(); 387 default: cvtpi2pd_Vo_Mq(); 388 } 389 0x3: movntpd_Mo_Vo(); 390 0x4: cvttpd2pi_Pq_Wo(); 391 0x5: cvtpd2pi_Pq_Wo(); 392 0x6: Inst::UCOMISD(Vq,Wq); 393 0x7: comisd_Vq_Wq(); 394 } 395 // repne (0xF2) 396 0x8: decode OPCODE_OP_BOTTOM3 { 397 // The size of the V operand should be q, not dp 398 0x2: Inst::CVTSI2SD(Vdp,Edp); 399 // The size of the W operand should be q, not dp 400 0x4: Inst::CVTTSD2SI(Gdp,Wdp); 401 0x5: cvtsd2si_Gd_Wq(); 402 default: Inst::UD2(); 403 } 404 default: Inst::UD2(); 405 } 406 0x06: decode OPCODE_OP_BOTTOM3 { 407 0x0: Inst::WRMSR(); 408 0x1: Inst::RDTSC(); 409 0x2: Inst::RDMSR(); 410 0x3: rdpmc(); 411 0x4: sysenter(); 412 0x5: sysexit(); 413 0x6: Inst::UD2(); 414 0x7: getsec(); 415 } 416 0x07: decode OPCODE_OP_BOTTOM3 { 417 0x0: three_byte_opcode(); 418 0x1: three_byte_opcode(); 419 0x2: three_byte_opcode(); 420 0x3: three_byte_opcode(); 421 0x4: three_byte_opcode(); 422 0x5: three_byte_opcode(); 423 0x6: three_byte_opcode(); 424 0x7: three_byte_opcode(); 425 } 426 format Inst { 427 0x08: decode OPCODE_OP_BOTTOM3 { 428 0x0: CMOVO(Gv,Ev); 429 0x1: CMOVNO(Gv,Ev); 430 0x2: CMOVB(Gv,Ev); 431 0x3: CMOVNB(Gv,Ev); 432 0x4: CMOVZ(Gv,Ev); 433 0x5: CMOVNZ(Gv,Ev); 434 0x6: CMOVBE(Gv,Ev); 435 0x7: CMOVNBE(Gv,Ev); 436 } 437 0x09: decode OPCODE_OP_BOTTOM3 { 438 0x0: CMOVS(Gv,Ev); 439 0x1: CMOVNS(Gv,Ev); 440 0x2: CMOVP(Gv,Ev); 441 0x3: CMOVNP(Gv,Ev); 442 0x4: CMOVL(Gv,Ev); 443 0x5: CMOVNL(Gv,Ev); 444 0x6: CMOVLE(Gv,Ev); 445 0x7: CMOVNLE(Gv,Ev); 446 } 447 } 448 0x0A: decode LEGACY_DECODEVAL { 449 // no prefix 450 0x0: decode OPCODE_OP_BOTTOM3 { 451 0x0: movmskps_Gd_VRo(); 452 0x1: sqrtps_Vo_Wo(); 453 0x2: rqsrtps_Vo_Wo(); 454 0x3: rcpps_Vo_Wo(); 455 0x4: andps_Vo_Wo(); 456 0x5: andnps_Vo_Wo(); 457 0x6: orps_Vo_Wo(); 458 0x7: xorps_Vo_Wo(); 459 } 460 // repe (0xF3) 461 0x4: decode OPCODE_OP_BOTTOM3 { 462 0x1: sqrtss_Vd_Wd(); 463 0x2: rsqrtss_Vd_Wd(); 464 0x3: rcpss_Vd_Wd(); 465 default: Inst::UD2(); 466 } 467 // operand size (0x66) 468 0x1: decode OPCODE_OP_BOTTOM3 { 469 0x0: movmskpd_Gd_VRo(); 470 0x1: sqrtpd_Vo_Wo(); 471 0x4: andpd_Vo_Wo(); 472 0x5: andnpd_Vo_Wo(); 473 0x6: orpd_Vo_Wo(); 474 //This really should be type o, but it works on q sized 475 //chunks at a time. 476 0x7: Inst::XORPD(Vq,Wq); 477 default: Inst::UD2(); 478 } 479 format Inst { 480 // repne (0xF2) 481 0x8: decode OPCODE_OP_BOTTOM3 { 482 0x1: SQRTSD(Vq,Wq); 483 default: UD2(); 484 } 485 default: UD2(); 486 } 487 } 488 0x0B: decode LEGACY_DECODEVAL { 489 // no prefix 490 0x0: decode OPCODE_OP_BOTTOM3 { 491 0x0: addps_Vo_Wo(); 492 0x1: mulps_Vo_Wo(); 493 0x2: cvtps2pd_Vo_Wq(); 494 0x3: cvtdq2ps_Vo_Wo(); 495 0x4: subps_Vo_Wo(); 496 0x5: minps_Vo_Wo(); 497 0x6: divps_Vo_Wo(); 498 0x7: maxps_Vo_Wo(); 499 } 500 // repe (0xF3) 501 0x4: decode OPCODE_OP_BOTTOM3 { 502 0x0: addss_Vd_Wd(); 503 0x1: mulss_Vd_Wd(); 504 0x2: cvtss2sd_Vq_Wd(); 505 0x3: cvttps2dq_Vo_Wo(); 506 0x4: subss_Vd_Wd(); 507 0x5: minss_Vd_Wd(); 508 0x6: divss_Vd_Wd(); 509 0x7: maxss_Vd_Wd(); 510 } 511 // operand size (0x66) 512 0x1: decode OPCODE_OP_BOTTOM3 { 513 0x0: addpd_Vo_Wo(); 514 0x1: mulpd_Vo_Wo(); 515 0x2: cvtpd2ps_Vo_Wo(); 516 0x3: cvtps2dq_Vo_Wo(); 517 0x4: subpd_Vo_Wo(); 518 0x5: minpd_Vo_Wo(); 519 0x6: divpd_Vo_Wo(); 520 0x7: maxpd_Vo_Wo(); 521 } 522 // repne (0xF2) 523 0x8: decode OPCODE_OP_BOTTOM3 { 524 0x0: Inst::ADDSD(Vq,Wq); 525 0x1: Inst::MULSD(Vq,Wq); 526 0x2: cvtsd2ss_Vd_Wq(); 527 0x4: Inst::SUBSD(Vq,Wq); 528 0x5: minsd_Vq_Wq(); 529 0x6: Inst::DIVSD(Vq,Wq); 530 0x7: maxsd_Vq_Wq(); 531 default: Inst::UD2(); 532 } 533 default: Inst::UD2(); 534 } 535 0x0C: decode LEGACY_DECODEVAL { 536 // no prefix 537 0x0: decode OPCODE_OP_BOTTOM3 { 538 0x0: punpcklbw_Pq_Qd(); 539 0x1: punpcklwd_Pq_Qd(); 540 0x2: punpckldq_Pq_Qd(); 541 0x3: packsswb_Pq_Qq(); 542 0x4: pcmpgtb_Pq_Qq(); 543 0x5: pcmpgtw_Pq_Qq(); 544 0x6: pcmpgtd_Pq_Qq(); 545 0x7: packuswb_Pq_Qq(); 546 } 547 // operand size (0x66) 548 0x1: decode OPCODE_OP_BOTTOM3 { 549 0x0: punpcklbw_Vo_Wq(); 550 0x1: punpcklwd_Vo_Wq(); 551 0x2: punpckldq_Vo_Wq(); 552 0x3: packsswb_Vo_Wo(); 553 0x4: pcmpgtb_Vo_Wo(); 554 0x5: pcmpgtw_Vo_Wo(); 555 0x6: pcmpgtd_Vo_Wo(); 556 0x7: packuswb_Vo_Wo(); 557 } 558 default: Inst::UD2(); 559 } 560 0x0D: decode LEGACY_DECODEVAL { 561 // no prefix 562 0x0: decode OPCODE_OP_BOTTOM3 { 563 0x0: punpckhbw_Pq_Qq(); 564 0x1: punpckhwd_Pq_Qq(); 565 0x2: punpckhdq_Pq_Qq(); 566 0x3: packssdw_Pq_Qq(); 567 0x6: movd_Pq_Ed(); 568 0x7: movq_Pq_Qq(); 569 default: Inst::UD2(); 570 } 571 // repe (0xF3) 572 0x4: decode OPCODE_OP_BOTTOM3 { 573 0x7: movdqu_Vo_Wo(); 574 default: Inst::UD2(); 575 } 576 // operand size (0x66) 577 0x1: decode OPCODE_OP_BOTTOM3 { 578 0x0: punpckhbw_Vo_Wo(); 579 0x1: punpckhwd_Vo_Wo(); 580 0x2: punpckhdq_Vo_Wo(); 581 0x3: packssdw_Vo_Wo(); 582 0x4: punpcklqdq_Vo_Wq(); 583 0x5: punpcklqdq_Vo_Wq(); 584 0x6: movd_Vo_Ed(); 585 0x7: movdqa_Vo_Wo(); 586 } 587 default: Inst::UD2(); 588 } 589 0x0E: decode LEGACY_DECODEVAL { 590 // no prefix 591 0x0: decode OPCODE_OP_BOTTOM3 { 592 0x0: pshufw_Pq_Qq_Ib(); 593 //0x1: group13_pshimw(); 594 0x1: decode MODRM_REG { 595 0x2: decode LEGACY_OP { 596 0x0: psrlw_PRq_Ib(); 597 0x1: psrlw_VRo_Ib(); 598 } 599 0x4: decode LEGACY_OP { 600 0x0: psraw_PRq_Ib(); 601 0x1: psraw_VRo_Ib(); 602 } 603 0x6: decode LEGACY_OP { 604 0x0: psllw_PRq_Ib(); 605 0x1: psllw_VRo_Ib(); 606 } 607 default: Inst::UD2(); 608 } 609 //0x2: group14_pshimd(); 610 0x2: decode MODRM_REG { 611 0x2: decode LEGACY_OP { 612 0x0: psrld_PRq_Ib(); 613 0x1: psrld_VRo_Ib(); 614 } 615 0x4: decode LEGACY_OP { 616 0x0: psrad_PRq_Ib(); 617 0x1: psrad_VRo_Ib(); 618 } 619 0x6: decode LEGACY_OP { 620 0x0: pslld_PRq_Ib(); 621 0x1: pslld_VRo_Ib(); 622 } 623 default: Inst::UD2(); 624 } 625 //0x3: group15_pshimq(); 626 0x3: decode MODRM_REG { 627 0x2: decode LEGACY_OP { 628 0x0: psrlq_PRq_Ib(); 629 0x1: psrlq_VRo_Ib(); 630 } 631 0x3: decode LEGACY_OP { 632 0x0: Inst::UD2(); 633 0x1: psrldq_VRo_Ib(); 634 } 635 0x6: decode LEGACY_OP { 636 0x0: psllq_PRq_Ib(); 637 0x1: psllq_VRo_Ib(); 638 } 639 0x7: decode LEGACY_OP { 640 0x0: Inst::UD2(); 641 0x1: pslldq_VRo_Ib(); 642 } 643 default: Inst::UD2(); 644 } 645 0x4: pcmpeqb_Pq_Qq(); 646 0x5: pcmpeqw_Pq_Qq(); 647 0x6: pcmpeqd_Pq_Qq(); 648 0x7: emms(); 649 } 650 // repe (0xF3) 651 0x4: decode OPCODE_OP_BOTTOM3 { 652 0x0: pshufhw_Vo_Wo_Ib(); 653 default: Inst::UD2(); 654 } 655 // operand size (0x66) 656 0x1: decode OPCODE_OP_BOTTOM3 { 657 0x0: pshufd_Vo_Wo_Ib(); 658 //0x1: group13_pshimw(); 659 0x1: decode MODRM_REG { 660 0x2: decode LEGACY_OP { 661 0x0: psrlw_PRq_Ib(); 662 0x1: psrlw_VRo_Ib(); 663 } 664 0x4: decode LEGACY_OP { 665 0x0: psraw_PRq_Ib(); 666 0x1: psraw_VRo_Ib(); 667 } 668 0x6: decode LEGACY_OP { 669 0x0: psllw_PRq_Ib(); 670 0x1: psllw_VRo_Ib(); 671 } 672 default: Inst::UD2(); 673 } 674 //0x2: group14_pshimd(); 675 0x2: decode MODRM_REG { 676 0x2: decode LEGACY_OP { 677 0x0: psrld_PRq_Ib(); 678 0x1: psrld_VRo_Ib(); 679 } 680 0x4: decode LEGACY_OP { 681 0x0: psrad_PRq_Ib(); 682 0x1: psrad_VRo_Ib(); 683 } 684 0x6: decode LEGACY_OP { 685 0x0: pslld_PRq_Ib(); 686 0x1: pslld_VRo_Ib(); 687 } 688 default: Inst::UD2(); 689 } 690 //0x3: group15_pshimq(); 691 0x3: decode MODRM_REG { 692 0x2: decode LEGACY_OP { 693 0x0: psrlq_PRq_Ib(); 694 0x1: psrlq_VRo_Ib(); 695 } 696 0x3: decode LEGACY_OP { 697 0x0: Inst::UD2(); 698 0x1: psrldq_VRo_Ib(); 699 } 700 0x6: decode LEGACY_OP { 701 0x0: psllq_PRq_Ib(); 702 0x1: psllq_VRo_Ib(); 703 } 704 0x7: decode LEGACY_OP { 705 0x0: Inst::UD2(); 706 0x1: pslldq_VRo_Ib(); 707 } 708 default: Inst::UD2(); 709 } 710 0x4: pcmpeqb_Vo_Wo(); 711 0x5: pcmpeqw_Vo_Wo(); 712 0x6: pcmpeqd_Vo_Wo(); 713 default: Inst::UD2(); 714 } 715 // repne (0xF2) 716 0x8: decode OPCODE_OP_BOTTOM3 { 717 0x0: pshuflw_Vo_Wo_Ib(); 718 default: Inst::UD2(); 719 } 720 default: Inst::UD2(); 721 } 722 0x0F: decode LEGACY_DECODEVAL { 723 // no prefix 724 0x0: decode OPCODE_OP_BOTTOM3 { 725 0x0: vmread_Ed_or_Eq_Gd_or_Gq(); 726 0x1: vmwrite_Gd_or_Gq_Ed_or_Eq(); 727 0x6: mov_Ed_Pd(); 728 0x7: mov_Qq_Pq(); 729 default: Inst::UD2(); 730 } 731 // repe (0xF3) 732 0x4: decode OPCODE_OP_BOTTOM3 { 733 0x6: movq_Vo_Mq_or_Vq_Vq(); 734 0x7: movdqu_Wo_Vo(); 735 default: Inst::UD2(); 736 } 737 // operand size (0x66) 738 0x1: decode OPCODE_OP_BOTTOM3 { 739 0x4: haddpd_Vo_Wo(); 740 0x5: hsubpd_Vo_Wo(); 741 0x6: movd_Ed_Vd(); 742 0x7: movdqa_Wo_Vo(); 743 default: Inst::UD2(); 744 } 745 // repne (0xF2) 746 0x8: decode OPCODE_OP_BOTTOM3 { 747 0x4: haddps_Vo_Wo(); 748 0x5: hsubps_Vo_Wo(); 749 default: Inst::UD2(); 750 } 751 default: Inst::UD2(); 752 } 753 format Inst { 754 0x10: decode OPCODE_OP_BOTTOM3 { 755 0x0: JO(Jz); 756 0x1: JNO(Jz); 757 0x2: JB(Jz); 758 0x3: JNB(Jz); 759 0x4: JZ(Jz); 760 0x5: JNZ(Jz); 761 0x6: JBE(Jz); 762 0x7: JNBE(Jz); 763 } 764 0x11: decode OPCODE_OP_BOTTOM3 { 765 0x0: JS(Jz); 766 0x1: JNS(Jz); 767 0x2: JP(Jz); 768 0x3: JNP(Jz); 769 0x4: JL(Jz); 770 0x5: JNL(Jz); 771 0x6: JLE(Jz); 772 0x7: JNLE(Jz); 773 } 774 0x12: decode OPCODE_OP_BOTTOM3 { 775 0x0: SETO(Eb); 776 0x1: SETNO(Eb); 777 0x2: SETB(Eb); 778 0x3: SETNB(Eb); 779 0x4: SETZ(Eb); 780 0x5: SETNZ(Eb); 781 0x6: SETBE(Eb); 782 0x7: SETNBE(Eb); 783 } 784 0x13: decode OPCODE_OP_BOTTOM3 { 785 0x0: SETS(Eb); 786 0x1: SETNS(Eb); 787 0x2: SETP(Eb); 788 0x3: SETNP(Eb); 789 0x4: SETL(Eb); 790 0x5: SETNL(Eb); 791 0x6: SETLE(Eb); 792 0x7: SETNLE(Eb); 793 } 794 } 795 0x14: decode OPCODE_OP_BOTTOM3 { 796 0x0: push_fs(); 797 0x1: pop_fs(); 798 0x2: CPUIDInst::CPUID({{ 799 CpuidResult result; 800 success = doCpuid(xc->tcBase(), Rax, result); 801 Rax = result.rax; 802 Rbx = result.rbx; 803 Rcx = result.rcx; 804 Rdx = result.rdx; 805 }}); 806 0x3: Inst::BT(Ev,Gv); 807 0x4: shld_Ev_Gv_Ib(); 808 0x5: shld_Ev_Gv_rCl(); 809 0x6: xbts_and_cmpxchg(); 810 0x7: ibts_and_cmpxchg(); 811 } 812 0x15: decode OPCODE_OP_BOTTOM3 { 813 0x0: push_gs(); 814 0x1: pop_gs(); 815 0x2: rsm_smm(); 816 0x3: Inst::BTS(Ev,Gv); 817 0x4: shrd_Ev_Gv_Ib(); 818 0x5: shrd_Ev_Gv_rCl(); 819 //0x6: group16(); 820 0x6: decode MODRM_MOD { 821 0x3: decode MODRM_REG { 822 0x5: lfence(); 823 0x6: mfence(); 824 0x7: sfence(); 825 default: Inst::UD2(); 826 } 827 default: decode MODRM_REG { 828 0x0: fxsave(); 829 0x1: fxrstor(); 830 0x7: clflush(); 831 default: Inst::UD2(); 832 } 833 } 834 0x7: Inst::IMUL(Gv,Ev); 835 } 836 0x16: decode OPCODE_OP_BOTTOM3 { 837 0x0: Inst::CMPXCHG(Eb,Gb); 838 0x1: Inst::CMPXCHG(Ev,Gv); 839 0x2: lss_Gz_Mp(); 840 0x3: Inst::BTR(Ev,Gv); 841 0x4: lfs_Gz_Mp(); 842 0x5: lgs_Gz_Mp(); 843 //The size of the second operand in these instructions should 844 //really be "b" or "w", but it's set to v in order to have a 845 //consistent register size. This shouldn't affect behavior. 846 0x6: Inst::MOVZX_B(Gv,Ev); 847 0x7: Inst::MOVZX_W(Gv,Ev); 848 } 849 0x17: decode OPCODE_OP_BOTTOM3 { 850 0x0: jmpe_Jz(); // IA-64? 851 format Inst { 852 //0x1: group11_UD2(); 853 0x1: UD2(); 854 //0x2: group8_Ev_Ib(); 855 0x2: decode MODRM_REG { 856 0x4: BT(Ev,Ib); 857 0x5: BTS(Ev,Ib); 858 0x6: BTR(Ev,Ib); 859 0x7: BTC(Ev,Ib); 860 default: UD2(); 861 } 862 0x3: BTC(Ev,Gv); 863 } 864 0x4: Inst::BSF(Gv,Ev); 865 0x5: Inst::BSR(Gv,Ev); 866 //The size of the second operand in these instructions should 867 //really be "b" or "w", but it's set to v in order to have a 868 //consistent register size. This shouldn't affect behavior. 869 0x6: Inst::MOVSX_B(Gv,Ev); 870 0x7: Inst::MOVSX_W(Gv,Ev); 871 } 872 0x18: decode OPCODE_OP_BOTTOM3 { 873 0x0: Inst::XADD(Eb,Gb); 874 0x1: Inst::XADD(Ev,Gv); 875 //0x7: group9(); 876 0x7: decode MODRM_REG { 877 0x1: cmpxchg_Mq(); 878 0x6: decode LEGACY_OP { 879 0x1: vmclear_Mq(); 880 default: decode LEGACY_REP { 881 0x1: vmxon_Mq(); 882 0x0: vmptrld_Mq(); 883 } 884 } 885 0x7: vmptrst_Mq(); 886 default: Inst::UD2(); 887 } 888 default: decode LEGACY_DECODEVAL { 889 // no prefix 890 0x0: decode OPCODE_OP_BOTTOM3 { 891 0x2: cmpccps_Vo_Wo_Ib(); 892 0x3: cvtdq2ps_Vo_Wo(); 893 0x4: subps_Vo_Wo(); 894 0x5: minps_Vo_Wo(); 895 0x6: divps_Vo_Wo(); 896 } 897 // repe (0xF3) 898 0x4: decode OPCODE_OP_BOTTOM3 { 899 0x2: cmpccss_Vd_Wd_Ib(); 900 default: Inst::UD2(); 901 } 902 // operand size (0x66) 903 0x1: decode OPCODE_OP_BOTTOM3 { 904 0x2: cmpccpd_Vo_Wo_Ib(); 905 0x4: subpd_Vo_Wo(); 906 0x5: minpd_Vo_Wo(); 907 0x6: divpd_Vo_Wo(); 908 default: Inst::UD2(); 909 } 910 // repne (0xF2) 911 0x8: decode OPCODE_OP_BOTTOM3 { 912 0x2: cmpccsd_Vq_Wq_Ib(); 913 default: Inst::UD2(); 914 } 915 default: Inst::UD2(); 916 } 917 } 918 0x19: decode OPSIZE { 919 4: Inst::BSWAP_D(Bd); 920 8: Inst::BSWAP_Q(Bq); 921 default: Inst::UD2(); 922 } 923 0x1A: decode LEGACY_DECODEVAL { 924 // no prefix 925 0x0: decode OPCODE_OP_BOTTOM3 { 926 0x1: psrlw_Pq_Qq(); 927 0x2: psrld_Pq_Qq(); 928 0x3: psrlq_Pq_Qq(); 929 0x4: paddq_Pq_Qq(); 930 0x5: pmullw_Pq_Qq(); 931 0x7: pmovmskb_Gd_PRq(); 932 default: Inst::UD2(); 933 } 934 // repe (0xF3) 935 0x4: decode OPCODE_OP_BOTTOM3 { 936 0x6: movq2dq_Vo_PRq(); 937 default: Inst::UD2(); 938 } 939 // operand size (0x66) 940 0x1: decode OPCODE_OP_BOTTOM3 { 941 0x0: addsubpd_Vo_Wo(); 942 0x1: psrlw_Vo_Wo(); 943 0x2: psrld_Vo_Wo(); 944 0x3: psrlq_Vo_Wo(); 945 0x4: paddq_Vo_Wo(); 946 0x5: pmullw_Vo_Wo(); 947 0x6: decode MODRM_MOD { 948 0x3: movq_Vq_Vq(); 949 default: movq_Mq_Vq(); 950 } 951 0x7: pmovmskb_Gd_VRo(); 952 } 953 // repne (0xF2) 954 0x8: decode OPCODE_OP_BOTTOM3 { 955 0x0: addsubps_Vo_Wo(); 956 0x6: movdq2q_Pq_VRq(); 957 default: Inst::UD2(); 958 } 959 default: Inst::UD2(); 960 } 961 0x1B: decode LEGACY_DECODEVAL { 962 // no prefix 963 0x0: decode OPCODE_OP_BOTTOM3 { 964 0x0: psubusb_Pq_Qq(); 965 0x1: psubusw_Pq_Qq(); 966 0x2: pminub_Pq_Qq(); 967 0x3: pand_Pq_Qq(); 968 0x4: paddusb_Pq_Qq(); 969 0x5: paddusw_Pq_Qq(); 970 0x6: pmaxub_Pq_Qq(); 971 0x7: pandn_Pq_Qq(); 972 } 973 // operand size (0x66) 974 0x1: decode OPCODE_OP_BOTTOM3 { 975 0x0: psubusb_Vo_Wo(); 976 0x1: psubusw_Vo_Wo(); 977 0x2: pminub_Vo_Wo(); 978 0x3: pand_Vo_Wo(); 979 0x4: paddusb_Vo_Wo(); 980 0x5: paddusw_Vo_Wo(); 981 0x6: pmaxub_Vo_Wo(); 982 0x7: pandn_Vo_Wo(); 983 } 984 default: Inst::UD2(); 985 } 986 0x1C: decode LEGACY_DECODEVAL { 987 // no prefix 988 0x0: decode OPCODE_OP_BOTTOM3 { 989 0x0: pavgb_Pq_Qq(); 990 0x1: psraw_Pq_Qq(); 991 0x2: psrad_Pq_Qq(); 992 0x3: pavgw_Pq_Qq(); 993 0x4: pmulhuw_Pq_Qq(); 994 0x5: pmulhw_Pq_Qq(); 995 0x7: movntq_Mq_Pq(); 996 default: Inst::UD2(); 997 } 998 // repe (0xF3) 999 0x4: decode OPCODE_OP_BOTTOM3 { 1000 0x6: cvtdq2pd_Vo_Wq(); 1001 default: Inst::UD2(); 1002 } 1003 // operand size (0x66) 1004 0x1: decode OPCODE_OP_BOTTOM3 { 1005 0x0: pavgb_Vo_Wo(); 1006 0x1: psraw_Vo_Wo(); 1007 0x2: psrad_Vo_Wo(); 1008 0x3: pavgw_Vo_Wo(); 1009 0x4: pmulhuw_Vo_Wo(); 1010 0x5: pmulhw_Vo_Wo(); 1011 0x6: cvttpd2dq_Vo_Wo(); 1012 0x7: movntdq_Mo_Vo(); 1013 } 1014 // repne (0xF2) 1015 0x8: decode OPCODE_OP_BOTTOM3 { 1016 0x6: cvtpd2dq_Vo_Wo(); 1017 default: Inst::UD2(); 1018 } 1019 default: Inst::UD2(); 1020 } 1021 0x1D: decode LEGACY_DECODEVAL { 1022 // no prefix 1023 0x0: decode OPCODE_OP_BOTTOM3 { 1024 0x0: psubsb_Pq_Qq(); 1025 0x1: psubsw_Pq_Qq(); 1026 0x2: pminsw_Pq_Qq(); 1027 0x3: por_Pq_Qq(); 1028 0x4: paddsb_Pq_Qq(); 1029 0x5: paddsw_Pq_Qq(); 1030 0x6: pmaxsw_Pq_Qq(); 1031 0x7: pxor_Pq_Qq(); 1032 } 1033 // operand size (0x66) 1034 0x1: decode OPCODE_OP_BOTTOM3 { 1035 0x0: psubsb_Vo_Wo(); 1036 0x1: psubsw_Vo_Wo(); 1037 0x2: pminsw_Vo_Wo(); 1038 0x3: por_Vo_Wo(); 1039 0x4: paddsb_Vo_Wo(); 1040 0x5: paddsw_Vo_Wo(); 1041 0x6: pmaxsw_Vo_Wo(); 1042 0x7: pxor_Vo_Wo(); 1043 } 1044 default: Inst::UD2(); 1045 } 1046 0x1E: decode OPCODE_OP_BOTTOM3 { 1047 // no prefix 1048 0x0: decode OPCODE_OP_BOTTOM3 { 1049 0x1: psllw_Pq_Qq(); 1050 0x2: pslld_Pq_Qq(); 1051 0x3: psllq_Pq_Qq(); 1052 0x4: pmuludq_Pq_Qq(); 1053 0x5: pmaddwd_Pq_Qq(); 1054 0x6: psadbw_Pq_Qq(); 1055 0x7: maskmovq_Pq_PRq(); 1056 default: Inst::UD2(); 1057 } 1058 // operand size (0x66) 1059 0x1: decode OPCODE_OP_BOTTOM3 { 1060 0x1: psllw_Vo_Wo(); 1061 0x2: pslld_Vo_Wo(); 1062 0x3: psllq_Vo_Wo(); 1063 0x4: pmuludq_Vo_Wo(); 1064 0x5: pmaddwd_Vo_Wo(); 1065 0x6: psadbw_Vo_Wo(); 1066 0x7: maskmovdqu_Vo_VRo(); 1067 default: Inst::UD2(); 1068 } 1069 // repne (0xF2) 1070 0x8: decode OPCODE_OP_BOTTOM3 { 1071 0x0: lddqu_Vo_Mo(); 1072 default: Inst::UD2(); 1073 } 1074 default: Inst::UD2(); 1075 } 1076 0x1F: decode LEGACY_DECODEVAL { 1077 // no prefix 1078 0x0: decode OPCODE_OP_BOTTOM3 { 1079 0x0: psubb_Pq_Qq(); 1080 0x1: psubw_Pq_Qq(); 1081 0x2: psubd_Pq_Qq(); 1082 0x3: psubq_Pq_Qq(); 1083 0x4: paddb_Pq_Qq(); 1084 0x5: paddw_Pq_Qq(); 1085 0x6: paddd_Pq_Qq(); 1086 0x7: Inst::UD2(); 1087 } 1088 // operand size (0x66) 1089 0x1: decode OPCODE_OP_BOTTOM3 { 1090 0x0: psubb_Vo_Wo(); 1091 0x1: psubw_Vo_Wo(); 1092 0x2: psubd_Vo_Wo(); 1093 0x3: psubq_Vo_Wo(); 1094 0x4: paddb_Vo_Wo(); 1095 0x5: paddw_Vo_Wo(); 1096 0x6: paddd_Vo_Wo(); 1097 0x7: Inst::UD2(); 1098 } 1099 default: Inst::UD2(); 1100 } 1101 default: FailUnimpl::twoByteOps(); 1102 } 1103 } 1104 default: M5InternalError::error( 1105 {{"Unexpected first opcode byte in two byte opcode!"}}); 1106} 1107