xref: /gem5/src/arch/x86/interrupts.hh

/*
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 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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 * Authors: Gabe Black
 */

#ifndef __ARCH_X86_INTERRUPTS_HH__
#define __ARCH_X86_INTERRUPTS_HH__

#include "arch/x86/apicregs.hh"
#include "arch/x86/faults.hh"
#include "cpu/thread_context.hh"
#include "dev/io_device.hh"
#include "dev/x86/intdev.hh"
#include "params/X86LocalApic.hh"
#include "sim/eventq.hh"

class ThreadContext;

namespace X86ISA
{

class Interrupts : public BasicPioDevice, IntDev
{
  protected:
    uint32_t regs[NUM_APIC_REGS];
    Tick latency;
    Tick clock;

    class ApicTimerEvent : public Event
    {
      public:
        ApicTimerEvent() : Event()
        {}

        void process()
        {
            warn("Local APIC timer event doesn't do anything!\n");
        }
    };

    ApicTimerEvent apicTimerEvent;

  public:
    typedef X86LocalApicParams Params;

    void setClock(Tick newClock)
    {
        clock = newClock;
    }

    const Params *
    params() const
    {
        return dynamic_cast<const Params *>(_params);
    }

    Tick read(PacketPtr pkt);
    Tick write(PacketPtr pkt);
    Tick recvMessage(PacketPtr pkt);

    void addressRanges(AddrRangeList &range_list)
    {
        range_list.clear();
        range_list.push_back(RangeEx(x86LocalAPICAddress(0, 0),
                                     x86LocalAPICAddress(0, 0) + PageBytes));
    }

    void getIntAddrRange(AddrRangeList &range_list)
    {
        range_list.clear();
        range_list.push_back(RangeEx(x86InterruptAddress(0, 0),
                    x86InterruptAddress(0, 0) + PhysAddrAPICRangeSize));
    }

    uint32_t readReg(ApicRegIndex miscReg);
    void setReg(ApicRegIndex reg, uint32_t val);
    void setRegNoEffect(ApicRegIndex reg, uint32_t val)
    {
        regs[reg] = val;
    }

    Interrupts(Params * p) : BasicPioDevice(p), IntDev(this),
                             latency(p->pio_latency), clock(0)
    {
        pioSize = PageBytes;
        //Set the local apic DFR to the flat model.
        regs[APIC_DESTINATION_FORMAT] = (uint32_t)(-1);
        memset(regs, 0, sizeof(regs));
        clear_all();
    }

    Port *getPort(const std::string &if_name, int idx = -1)
    {
        if (if_name == "int_port")
            return intPort;
        return BasicPioDevice::getPort(if_name, idx);
    }

    int InterruptLevel(uint64_t softint)
    {
        panic("Interrupts::InterruptLevel unimplemented!\n");
        return 0;
    }

    void post(int int_num, int index)
    {
        panic("Interrupts::post unimplemented!\n");
    }

    void clear(int int_num, int index)
    {
        warn("Interrupts::clear unimplemented!\n");
    }

    void clear_all()
    {
        warn("Interrupts::clear_all unimplemented!\n");
    }

    bool check_interrupts(ThreadContext * tc) const
    {
        return false;
    }

    Fault getInterrupt(ThreadContext * tc)
    {
        return NoFault;
    }

    void updateIntrInfo(ThreadContext * tc)
    {
        panic("Interrupts::updateIntrInfo unimplemented!\n");
    }

    void serialize(std::ostream & os)
    {
        panic("Interrupts::serialize unimplemented!\n");
    }

    void unserialize(Checkpoint * cp, const std::string & section)
    {
        panic("Interrupts::unserialize unimplemented!\n");
    }
};

};

#endif // __ARCH_X86_INTERRUPTS_HH__