interrupts.hh revision 5651
1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * Redistribution and use of this software in source and binary forms,
6 * with or without modification, are permitted provided that the
7 * following conditions are met:
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10 * use which is NOT directed to receiving any direct monetary
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12 * examples of non-commercial use are academic research, personal study,
13 * teaching, education and corporate research & development.
14 * Illustrative examples of commercial use are distributing products for
15 * commercial advantage and providing services using the software for
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17 *
18 * If you wish to use this software or functionality therein that may be
19 * covered by patents for commercial use, please contact:
20 *     Director of Intellectual Property Licensing
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24 *     Palo Alto, California  94304
25 *
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33 * this software without specific prior written permission.  No right of
34 * sublicense is granted herewith.  Derivatives of the software and
35 * output created using the software may be prepared, but only for
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39 * and (ii) such Derivatives of the software include the above copyright
40 * notice to acknowledge the contribution from this software where
41 * applicable, this list of conditions and the disclaimer below.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 *
55 * Authors: Gabe Black
56 */
57
58#ifndef __ARCH_X86_INTERRUPTS_HH__
59#define __ARCH_X86_INTERRUPTS_HH__
60
61#include "arch/x86/apicregs.hh"
62#include "arch/x86/faults.hh"
63#include "cpu/thread_context.hh"
64#include "dev/io_device.hh"
65#include "dev/x86/intdev.hh"
66#include "params/X86LocalApic.hh"
67#include "sim/eventq.hh"
68
69class ThreadContext;
70
71namespace X86ISA
72{
73
74class Interrupts : public BasicPioDevice, IntDev
75{
76  protected:
77    uint32_t regs[NUM_APIC_REGS];
78    Tick latency;
79    Tick clock;
80
81    class ApicTimerEvent : public Event
82    {
83      public:
84        ApicTimerEvent() : Event()
85        {}
86
87        void process()
88        {
89            warn("Local APIC timer event doesn't do anything!\n");
90        }
91    };
92
93    ApicTimerEvent apicTimerEvent;
94
95  public:
96    typedef X86LocalApicParams Params;
97
98    void setClock(Tick newClock)
99    {
100        clock = newClock;
101    }
102
103    const Params *
104    params() const
105    {
106        return dynamic_cast<const Params *>(_params);
107    }
108
109    Tick read(PacketPtr pkt);
110    Tick write(PacketPtr pkt);
111    Tick recvMessage(PacketPtr pkt);
112
113    void addressRanges(AddrRangeList &range_list)
114    {
115        range_list.clear();
116        range_list.push_back(RangeEx(x86LocalAPICAddress(0, 0),
117                                     x86LocalAPICAddress(0, 0) + PageBytes));
118    }
119
120    void getIntAddrRange(AddrRangeList &range_list)
121    {
122        range_list.clear();
123        range_list.push_back(RangeEx(x86InterruptAddress(0, 0),
124                    x86InterruptAddress(0, 0) + PhysAddrAPICRangeSize));
125    }
126
127    uint32_t readReg(ApicRegIndex miscReg);
128    void setReg(ApicRegIndex reg, uint32_t val);
129    void setRegNoEffect(ApicRegIndex reg, uint32_t val)
130    {
131        regs[reg] = val;
132    }
133
134    Interrupts(Params * p) : BasicPioDevice(p), IntDev(this),
135                             latency(p->pio_latency), clock(0)
136    {
137        pioSize = PageBytes;
138        //Set the local apic DFR to the flat model.
139        regs[APIC_DESTINATION_FORMAT] = (uint32_t)(-1);
140        memset(regs, 0, sizeof(regs));
141        clear_all();
142    }
143
144    Port *getPort(const std::string &if_name, int idx = -1)
145    {
146        if (if_name == "int_port")
147            return intPort;
148        return BasicPioDevice::getPort(if_name, idx);
149    }
150
151    int InterruptLevel(uint64_t softint)
152    {
153        panic("Interrupts::InterruptLevel unimplemented!\n");
154        return 0;
155    }
156
157    void post(int int_num, int index)
158    {
159        panic("Interrupts::post unimplemented!\n");
160    }
161
162    void clear(int int_num, int index)
163    {
164        warn("Interrupts::clear unimplemented!\n");
165    }
166
167    void clear_all()
168    {
169        warn("Interrupts::clear_all unimplemented!\n");
170    }
171
172    bool check_interrupts(ThreadContext * tc) const
173    {
174        return false;
175    }
176
177    Fault getInterrupt(ThreadContext * tc)
178    {
179        return NoFault;
180    }
181
182    void updateIntrInfo(ThreadContext * tc)
183    {
184        panic("Interrupts::updateIntrInfo unimplemented!\n");
185    }
186
187    void serialize(std::ostream & os)
188    {
189        panic("Interrupts::serialize unimplemented!\n");
190    }
191
192    void unserialize(Checkpoint * cp, const std::string & section)
193    {
194        panic("Interrupts::unserialize unimplemented!\n");
195    }
196};
197
198};
199
200#endif // __ARCH_X86_INTERRUPTS_HH__
201