cpuid.cc revision 10552:41ebfed1dc89 
1/*
2 * Copyright (c) 2008 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31#include "arch/x86/cpuid.hh"
32#include "base/bitfield.hh"
33#include "cpu/thread_context.hh"
34
35namespace X86ISA {
36    enum StandardCpuidFunction {
37        VendorAndLargestStdFunc,
38        FamilyModelStepping,
39        NumStandardCpuidFuncs
40    };
41
42    enum ExtendedCpuidFunctions {
43        VendorAndLargestExtFunc,
44        FamilyModelSteppingBrandFeatures,
45        NameString1,
46        NameString2,
47        NameString3,
48        L1CacheAndTLB,
49        L2L3CacheAndL2TLB,
50        APMInfo,
51        LongModeAddressSize,
52
53        /*
54         * The following are defined by the spec but not yet implemented
55         */
56/*      // Function 9 is reserved
57        SVMInfo = 10,
58        // Functions 11-24 are reserved
59        TLB1GBPageInfo = 25,
60        PerformanceInfo,*/
61
62        NumExtendedCpuidFuncs
63    };
64
65    static const int vendorStringSize = 13;
66    static const char vendorString[vendorStringSize] = "M5 Simulator";
67    static const int nameStringSize = 48;
68    static const char nameString[nameStringSize] = "Fake M5 x86_64 CPU";
69
70    uint64_t
71    stringToRegister(const char *str)
72    {
73        uint64_t reg = 0;
74        for (int pos = 3; pos >=0; pos--) {
75            reg <<= 8;
76            reg |= str[pos];
77        }
78        return reg;
79    }
80
81    bool
82    doCpuid(ThreadContext * tc, uint32_t function,
83            uint32_t index, CpuidResult &result)
84    {
85        uint16_t family = bits(function, 31, 16);
86        uint16_t funcNum = bits(function, 15, 0);
87        if (family == 0x8000) {
88            // The extended functions
89            switch (funcNum) {
90              case VendorAndLargestExtFunc:
91                assert(vendorStringSize >= 12);
92                result = CpuidResult(
93                        0x80000000 + NumExtendedCpuidFuncs - 1,
94                        stringToRegister(vendorString),
95                        stringToRegister(vendorString + 4),
96                        stringToRegister(vendorString + 8));
97                break;
98              case FamilyModelSteppingBrandFeatures:
99                /** Features Enabling
100                 * rdx, enabling most of the features except:
101                 * FXSR, FFXSR, Page1GB in EDX
102                 *
103                 * rcx, disabling most of the features except:
104                 * SSE4A, XOP, FMA4 in ECX
105                 */
106                result = CpuidResult(0x00020f51, 0x00000405,
107                                     0xe3d3fbff, 0x00010840);
108                break;
109              case NameString1:
110              case NameString2:
111              case NameString3:
112                {
113                    // Zero fill anything beyond the end of the string. This
114                    // should go away once the string is a vetted parameter.
115                    char cleanName[nameStringSize];
116                    memset(cleanName, '\0', nameStringSize);
117                    strncpy(cleanName, nameString, nameStringSize);
118
119                    int offset = (funcNum - NameString1) * 16;
120                    assert(nameStringSize >= offset + 16);
121                    result = CpuidResult(
122                            stringToRegister(cleanName + offset + 0),
123                            stringToRegister(cleanName + offset + 4),
124                            stringToRegister(cleanName + offset + 12),
125                            stringToRegister(cleanName + offset + 8));
126                }
127                break;
128              case L1CacheAndTLB:
129                result = CpuidResult(0xff08ff08, 0xff20ff20,
130                                     0x40020140, 0x40020140);
131                break;
132              case L2L3CacheAndL2TLB:
133                result = CpuidResult(0x00000000, 0x42004200,
134                                     0x00000000, 0x04008140);
135                break;
136              case APMInfo:
137                result = CpuidResult(0x80000018, 0x68747541,
138                                     0x69746e65, 0x444d4163);
139                break;
140              case LongModeAddressSize:
141                result = CpuidResult(0x00003030, 0x00000000,
142                                     0x00000000, 0x00000000);
143                break;
144/*            case SVMInfo:
145              case TLB1GBPageInfo:
146              case PerformanceInfo:*/
147              default:
148                warn("x86 cpuid: unimplemented function %u", funcNum);
149                return false;
150            }
151        } else if(family == 0x0000) {
152            // The standard functions
153            switch (funcNum) {
154              case VendorAndLargestStdFunc:
155                assert(vendorStringSize >= 12);
156                result = CpuidResult(
157                        NumStandardCpuidFuncs - 1,
158                        stringToRegister(vendorString),
159                        stringToRegister(vendorString + 4),
160                        stringToRegister(vendorString + 8));
161                break;
162              case FamilyModelStepping:
163                /** Features Enabling
164                 * rdx, enabling most of the features except:
165                 * HTT in EDX
166                 *
167                 * rcx, disabling most of the features except:
168                 * SSE3, SSSE3, FMA, SSE41, XSAVE, AVX in ECX
169                 */
170                result = CpuidResult(0x00020f51, 0x00000805,
171                                     0xe7dbfbff, 0x14081201);
172                break;
173              default:
174                warn("x86 cpuid: unimplemented function %u", funcNum);
175                return false;
176            }
177        } else {
178            warn("x86 cpuid: unknown family %#x", family);
179            return false;
180        }
181
182        return true;
183    }
184} // namespace X86ISA
185