1/* 2 * Copyright (c) 2008 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Gabe Black 29 */ 30 31#include "arch/x86/cpuid.hh" 32 33#include "base/bitfield.hh" 34#include "cpu/thread_context.hh" 35 36namespace X86ISA { 37 enum StandardCpuidFunction { 38 VendorAndLargestStdFunc, 39 FamilyModelStepping, 40 CacheAndTLB, 41 SerialNumber, 42 CacheParams, 43 MonitorMwait, 44 ThermalPowerMgmt, 45 ExtendedFeatures, 46 NumStandardCpuidFuncs 47 }; 48 49 enum ExtendedCpuidFunctions { 50 VendorAndLargestExtFunc, 51 FamilyModelSteppingBrandFeatures, 52 NameString1, 53 NameString2, 54 NameString3, 55 L1CacheAndTLB, 56 L2L3CacheAndL2TLB, 57 APMInfo, 58 LongModeAddressSize, 59 60 /* 61 * The following are defined by the spec but not yet implemented 62 */ 63/* // Function 9 is reserved 64 SVMInfo = 10, 65 // Functions 11-24 are reserved 66 TLB1GBPageInfo = 25, 67 PerformanceInfo,*/ 68 69 NumExtendedCpuidFuncs 70 }; 71 72 static const int vendorStringSize = 13; 73 static const char vendorString[vendorStringSize] = "M5 Simulator"; 74 static const int nameStringSize = 48; 75 static const char nameString[nameStringSize] = "Fake M5 x86_64 CPU"; 76 77 uint64_t 78 stringToRegister(const char *str) 79 { 80 uint64_t reg = 0; 81 for (int pos = 3; pos >=0; pos--) { 82 reg <<= 8; 83 reg |= str[pos]; 84 } 85 return reg; 86 } 87 88 bool 89 doCpuid(ThreadContext * tc, uint32_t function, 90 uint32_t index, CpuidResult &result) 91 { 92 uint16_t family = bits(function, 31, 16); 93 uint16_t funcNum = bits(function, 15, 0); 94 if (family == 0x8000) { 95 // The extended functions 96 switch (funcNum) { 97 case VendorAndLargestExtFunc: 98 assert(vendorStringSize >= 12); 99 result = CpuidResult( 100 0x80000000 + NumExtendedCpuidFuncs - 1, 101 stringToRegister(vendorString), 102 stringToRegister(vendorString + 4), 103 stringToRegister(vendorString + 8)); 104 break; 105 case FamilyModelSteppingBrandFeatures: 106 result = CpuidResult(0x00020f51, 0x00000405, 107 0xe3d3fbff, 0x00000001); 108 break; 109 case NameString1: 110 case NameString2: 111 case NameString3: 112 { 113 // Zero fill anything beyond the end of the string. This 114 // should go away once the string is a vetted parameter. 115 char cleanName[nameStringSize]; 116 memset(cleanName, '\0', nameStringSize); 117 strncpy(cleanName, nameString, nameStringSize); 118 119 int offset = (funcNum - NameString1) * 16; 120 assert(nameStringSize >= offset + 16); 121 result = CpuidResult( 122 stringToRegister(cleanName + offset + 0), 123 stringToRegister(cleanName + offset + 4), 124 stringToRegister(cleanName + offset + 12), 125 stringToRegister(cleanName + offset + 8)); 126 } 127 break; 128 case L1CacheAndTLB: 129 result = CpuidResult(0xff08ff08, 0xff20ff20, 130 0x40020140, 0x40020140); 131 break; 132 case L2L3CacheAndL2TLB: 133 result = CpuidResult(0x00000000, 0x42004200, 134 0x00000000, 0x04008140); 135 break; 136 case APMInfo: 137 result = CpuidResult(0x80000018, 0x68747541, 138 0x69746e65, 0x444d4163); 139 break; 140 case LongModeAddressSize: 141 result = CpuidResult(0x00003030, 0x00000000, 142 0x00000000, 0x00000000); 143 break; 144/* case SVMInfo: 145 case TLB1GBPageInfo: 146 case PerformanceInfo:*/ 147 default: 148 warn("x86 cpuid family 0x8000: unimplemented function %u", 149 funcNum); 150 return false; 151 } 152 } else if (family == 0x0000) { 153 // The standard functions 154 switch (funcNum) { 155 case VendorAndLargestStdFunc: 156 assert(vendorStringSize >= 12); 157 result = CpuidResult( 158 NumStandardCpuidFuncs - 1, 159 stringToRegister(vendorString), 160 stringToRegister(vendorString + 4), 161 stringToRegister(vendorString + 8)); 162 break; 163 case FamilyModelStepping: 164 result = CpuidResult(0x00020f51, 0x00000805, 165 0xe7dbfbff, 0x00000209); 166 break; 167 case ExtendedFeatures: 168 result = CpuidResult(0x00000000, 0x01800000, 169 0x00000000, 0x00000000); 170 break; 171 default: 172 warn("x86 cpuid family 0x0000: unimplemented function %u", 173 funcNum); 174 return false; 175 } 176 } else { 177 warn("x86 cpuid: unknown family %#x", family); 178 return false; 179 } 180 181 return true; 182 } 183} // namespace X86ISA 184