process.cc revision 5771:f58d82cb8b7f 
1/*
2 * Copyright (c) 2003-2004 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 *          Ali Saidi
30 */
31
32#include "arch/sparc/asi.hh"
33#include "arch/sparc/handlers.hh"
34#include "arch/sparc/isa_traits.hh"
35#include "arch/sparc/process.hh"
36#include "arch/sparc/types.hh"
37#include "base/loader/object_file.hh"
38#include "base/loader/elf_object.hh"
39#include "base/misc.hh"
40#include "cpu/thread_context.hh"
41#include "mem/page_table.hh"
42#include "sim/process_impl.hh"
43#include "mem/translating_port.hh"
44#include "sim/system.hh"
45
46using namespace std;
47using namespace SparcISA;
48
49
50SparcLiveProcess::SparcLiveProcess(LiveProcessParams * params,
51        ObjectFile *objFile, Addr _StackBias)
52    : LiveProcess(params, objFile), StackBias(_StackBias)
53{
54
55    // XXX all the below need to be updated for SPARC - Ali
56    brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize();
57    brk_point = roundUp(brk_point, VMPageSize);
58
59    // Set pointer for next thread stack.  Reserve 8M for main stack.
60    next_thread_stack_base = stack_base - (8 * 1024 * 1024);
61
62    //Initialize these to 0s
63    fillStart = 0;
64    spillStart = 0;
65}
66
67void SparcLiveProcess::handleTrap(int trapNum, ThreadContext *tc)
68{
69    switch(trapNum)
70    {
71      case 0x01: //Software breakpoint
72        warn("Software breakpoint encountered at pc %#x.\n", tc->readPC());
73        break;
74      case 0x02: //Division by zero
75        warn("Software signaled a division by zero at pc %#x.\n",
76                tc->readPC());
77        break;
78      case 0x03: //Flush window trap
79        flushWindows(tc);
80        break;
81      case 0x04: //Clean windows
82        warn("Ignoring process request for clean register "
83                "windows at pc %#x.\n", tc->readPC());
84        break;
85      case 0x05: //Range check
86        warn("Software signaled a range check at pc %#x.\n",
87                tc->readPC());
88        break;
89      case 0x06: //Fix alignment
90        warn("Ignoring process request for os assisted unaligned accesses "
91                "at pc %#x.\n", tc->readPC());
92        break;
93      case 0x07: //Integer overflow
94        warn("Software signaled an integer overflow at pc %#x.\n",
95                tc->readPC());
96        break;
97      case 0x32: //Get integer condition codes
98        warn("Ignoring process request to get the integer condition codes "
99                "at pc %#x.\n", tc->readPC());
100        break;
101      case 0x33: //Set integer condition codes
102        warn("Ignoring process request to set the integer condition codes "
103                "at pc %#x.\n", tc->readPC());
104        break;
105      default:
106        panic("Unimplemented trap to operating system: trap number %#x.\n", trapNum);
107    }
108}
109
110void
111SparcLiveProcess::startup()
112{
113    Process::startup();
114
115    ThreadContext *tc = system->getThreadContext(contextIds[0]);
116    //From the SPARC ABI
117
118    //Setup default FP state
119    tc->setMiscRegNoEffect(MISCREG_FSR, 0);
120
121    tc->setMiscRegNoEffect(MISCREG_TICK, 0);
122
123    /*
124     * Register window management registers
125     */
126
127    //No windows contain info from other programs
128    //tc->setMiscRegNoEffect(MISCREG_OTHERWIN, 0);
129    tc->setIntReg(NumIntArchRegs + 6, 0);
130    //There are no windows to pop
131    //tc->setMiscRegNoEffect(MISCREG_CANRESTORE, 0);
132    tc->setIntReg(NumIntArchRegs + 4, 0);
133    //All windows are available to save into
134    //tc->setMiscRegNoEffect(MISCREG_CANSAVE, NWindows - 2);
135    tc->setIntReg(NumIntArchRegs + 3, NWindows - 2);
136    //All windows are "clean"
137    //tc->setMiscRegNoEffect(MISCREG_CLEANWIN, NWindows);
138    tc->setIntReg(NumIntArchRegs + 5, NWindows);
139    //Start with register window 0
140    tc->setMiscRegNoEffect(MISCREG_CWP, 0);
141    //Always use spill and fill traps 0
142    //tc->setMiscRegNoEffect(MISCREG_WSTATE, 0);
143    tc->setIntReg(NumIntArchRegs + 7, 0);
144    //Set the trap level to 0
145    tc->setMiscRegNoEffect(MISCREG_TL, 0);
146    //Set the ASI register to something fixed
147    tc->setMiscRegNoEffect(MISCREG_ASI, ASI_PRIMARY);
148
149    /*
150     * T1 specific registers
151     */
152    //Turn on the icache, dcache, dtb translation, and itb translation.
153    tc->setMiscRegNoEffect(MISCREG_MMU_LSU_CTRL, 15);
154}
155
156void
157Sparc32LiveProcess::startup()
158{
159    if (checkpointRestored)
160        return;
161
162    SparcLiveProcess::startup();
163
164    ThreadContext *tc = system->getThreadContext(contextIds[0]);
165    //The process runs in user mode with 32 bit addresses
166    tc->setMiscReg(MISCREG_PSTATE, 0x0a);
167
168    argsInit(32 / 8, VMPageSize);
169}
170
171void
172Sparc64LiveProcess::startup()
173{
174    if (checkpointRestored)
175        return;
176
177    SparcLiveProcess::startup();
178
179    ThreadContext *tc = system->getThreadContext(contextIds[0]);
180    //The process runs in user mode
181    tc->setMiscReg(MISCREG_PSTATE, 0x02);
182
183    argsInit(sizeof(IntReg), VMPageSize);
184}
185
186template<class IntType>
187void
188SparcLiveProcess::argsInit(int pageSize)
189{
190    int intSize = sizeof(IntType);
191
192    typedef AuxVector<IntType> auxv_t;
193
194    std::vector<auxv_t> auxv;
195
196    string filename;
197    if(argv.size() < 1)
198        filename = "";
199    else
200        filename = argv[0];
201
202    //Even for a 32 bit process, the ABI says we still need to
203    //maintain double word alignment of the stack pointer.
204    uint64_t align = 16;
205
206    // load object file into target memory
207    objFile->loadSections(initVirtMem);
208
209    enum hardwareCaps
210    {
211        M5_HWCAP_SPARC_FLUSH = 1,
212        M5_HWCAP_SPARC_STBAR = 2,
213        M5_HWCAP_SPARC_SWAP = 4,
214        M5_HWCAP_SPARC_MULDIV = 8,
215        M5_HWCAP_SPARC_V9 = 16,
216        //This one should technically only be set
217        //if there is a cheetah or cheetah_plus tlb,
218        //but we'll use it all the time
219        M5_HWCAP_SPARC_ULTRA3 = 32
220    };
221
222    const int64_t hwcap =
223        M5_HWCAP_SPARC_FLUSH |
224        M5_HWCAP_SPARC_STBAR |
225        M5_HWCAP_SPARC_SWAP |
226        M5_HWCAP_SPARC_MULDIV |
227        M5_HWCAP_SPARC_V9 |
228        M5_HWCAP_SPARC_ULTRA3;
229
230    //Setup the auxilliary vectors. These will already have endian conversion.
231    //Auxilliary vectors are loaded only for elf formatted executables.
232    ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile);
233    if(elfObject)
234    {
235        //Bits which describe the system hardware capabilities
236        auxv.push_back(auxv_t(M5_AT_HWCAP, hwcap));
237        //The system page size
238        auxv.push_back(auxv_t(M5_AT_PAGESZ, SparcISA::VMPageSize));
239        //Defined to be 100 in the kernel source.
240        //Frequency at which times() increments
241        auxv.push_back(auxv_t(M5_AT_CLKTCK, 100));
242        // For statically linked executables, this is the virtual address of the
243        // program header tables if they appear in the executable image
244        auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable()));
245        // This is the size of a program header entry from the elf file.
246        auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize()));
247        // This is the number of program headers from the original elf file.
248        auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount()));
249        //This is the address of the elf "interpreter", It should be set
250        //to 0 for regular executables. It should be something else
251        //(not sure what) for dynamic libraries.
252        auxv.push_back(auxv_t(M5_AT_BASE, 0));
253        //This is hardwired to 0 in the elf loading code in the kernel
254        auxv.push_back(auxv_t(M5_AT_FLAGS, 0));
255        //The entry point to the program
256        auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint()));
257        //Different user and group IDs
258        auxv.push_back(auxv_t(M5_AT_UID, uid()));
259        auxv.push_back(auxv_t(M5_AT_EUID, euid()));
260        auxv.push_back(auxv_t(M5_AT_GID, gid()));
261        auxv.push_back(auxv_t(M5_AT_EGID, egid()));
262        //Whether to enable "secure mode" in the executable
263        auxv.push_back(auxv_t(M5_AT_SECURE, 0));
264    }
265
266    //Figure out how big the initial stack needs to be
267
268    // The unaccounted for 8 byte 0 at the top of the stack
269    int sentry_size = 8;
270
271    //This is the name of the file which is present on the initial stack
272    //It's purpose is to let the user space linker examine the original file.
273    int file_name_size = filename.size() + 1;
274
275    int env_data_size = 0;
276    for (int i = 0; i < envp.size(); ++i) {
277        env_data_size += envp[i].size() + 1;
278    }
279    int arg_data_size = 0;
280    for (int i = 0; i < argv.size(); ++i) {
281        arg_data_size += argv[i].size() + 1;
282    }
283
284    //The info_block.
285    int base_info_block_size =
286        sentry_size + file_name_size + env_data_size + arg_data_size;
287
288    int info_block_size = roundUp(base_info_block_size, align);
289
290    int info_block_padding = info_block_size - base_info_block_size;
291
292    //Each auxilliary vector is two words
293    int aux_array_size = intSize * 2 * (auxv.size() + 1);
294
295    int envp_array_size = intSize * (envp.size() + 1);
296    int argv_array_size = intSize * (argv.size() + 1);
297
298    int argc_size = intSize;
299    int window_save_size = intSize * 16;
300
301    //Figure out the size of the contents of the actual initial frame
302    int frame_size =
303        aux_array_size +
304        envp_array_size +
305        argv_array_size +
306        argc_size +
307        window_save_size;
308
309    //There needs to be padding after the auxiliary vector data so that the
310    //very bottom of the stack is aligned properly.
311    int aligned_partial_size = roundUp(frame_size, align);
312    int aux_padding = aligned_partial_size - frame_size;
313
314    int space_needed =
315        info_block_size +
316        aux_padding +
317        frame_size;
318
319    stack_min = stack_base - space_needed;
320    stack_min = roundDown(stack_min, align);
321    stack_size = stack_base - stack_min;
322
323    // Allocate space for the stack
324    pTable->allocate(roundDown(stack_min, pageSize),
325                     roundUp(stack_size, pageSize));
326
327    // map out initial stack contents
328    IntType sentry_base = stack_base - sentry_size;
329    IntType file_name_base = sentry_base - file_name_size;
330    IntType env_data_base = file_name_base - env_data_size;
331    IntType arg_data_base = env_data_base - arg_data_size;
332    IntType auxv_array_base = arg_data_base -
333        info_block_padding - aux_array_size - aux_padding;
334    IntType envp_array_base = auxv_array_base - envp_array_size;
335    IntType argv_array_base = envp_array_base - argv_array_size;
336    IntType argc_base = argv_array_base - argc_size;
337#if TRACING_ON
338    IntType window_save_base = argc_base - window_save_size;
339#endif
340
341    DPRINTF(Sparc, "The addresses of items on the initial stack:\n");
342    DPRINTF(Sparc, "%#x - sentry NULL\n", sentry_base);
343    DPRINTF(Sparc, "filename = %s\n", filename);
344    DPRINTF(Sparc, "%#x - file name\n", file_name_base);
345    DPRINTF(Sparc, "%#x - env data\n", env_data_base);
346    DPRINTF(Sparc, "%#x - arg data\n", arg_data_base);
347    DPRINTF(Sparc, "%#x - auxv array\n", auxv_array_base);
348    DPRINTF(Sparc, "%#x - envp array\n", envp_array_base);
349    DPRINTF(Sparc, "%#x - argv array\n", argv_array_base);
350    DPRINTF(Sparc, "%#x - argc \n", argc_base);
351    DPRINTF(Sparc, "%#x - window save\n", window_save_base);
352    DPRINTF(Sparc, "%#x - stack min\n", stack_min);
353
354    assert(window_save_base == stack_min);
355
356    // write contents to stack
357
358    // figure out argc
359    IntType argc = argv.size();
360    IntType guestArgc = SparcISA::htog(argc);
361
362    //Write out the sentry void *
363    uint64_t sentry_NULL = 0;
364    initVirtMem->writeBlob(sentry_base,
365            (uint8_t*)&sentry_NULL, sentry_size);
366
367    //Write the file name
368    initVirtMem->writeString(file_name_base, filename.c_str());
369
370    //Copy the aux stuff
371    for(int x = 0; x < auxv.size(); x++)
372    {
373        initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize,
374                (uint8_t*)&(auxv[x].a_type), intSize);
375        initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
376                (uint8_t*)&(auxv[x].a_val), intSize);
377    }
378
379    //Write out the terminating zeroed auxilliary vector
380    const IntType zero = 0;
381    initVirtMem->writeBlob(auxv_array_base + intSize * 2 * auxv.size(),
382            (uint8_t*)&zero, intSize);
383    initVirtMem->writeBlob(auxv_array_base + intSize * (2 * auxv.size() + 1),
384            (uint8_t*)&zero, intSize);
385
386    copyStringArray(envp, envp_array_base, env_data_base, initVirtMem);
387    copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem);
388
389    initVirtMem->writeBlob(argc_base, (uint8_t*)&guestArgc, intSize);
390
391    //Set up space for the trap handlers into the processes address space.
392    //Since the stack grows down and there is reserved address space abov
393    //it, we can put stuff above it and stay out of the way.
394    fillStart = stack_base;
395    spillStart = fillStart + sizeof(MachInst) * numFillInsts;
396
397    ThreadContext *tc = system->getThreadContext(contextIds[0]);
398    //Set up the thread context to start running the process
399    //assert(NumArgumentRegs >= 2);
400    //tc->setIntReg(ArgumentReg[0], argc);
401    //tc->setIntReg(ArgumentReg[1], argv_array_base);
402    tc->setIntReg(StackPointerReg, stack_min - StackBias);
403
404    // %g1 is a pointer to a function that should be run at exit. Since we
405    // don't have anything like that, it should be set to 0.
406    tc->setIntReg(1, 0);
407
408    Addr prog_entry = objFile->entryPoint();
409    tc->setPC(prog_entry);
410    tc->setNextPC(prog_entry + sizeof(MachInst));
411    tc->setNextNPC(prog_entry + (2 * sizeof(MachInst)));
412
413    //Align the "stack_min" to a page boundary.
414    stack_min = roundDown(stack_min, pageSize);
415
416//    num_processes++;
417}
418
419void
420Sparc64LiveProcess::argsInit(int intSize, int pageSize)
421{
422    SparcLiveProcess::argsInit<uint64_t>(pageSize);
423
424    // Stuff the trap handlers into the process address space
425    initVirtMem->writeBlob(fillStart,
426            (uint8_t*)fillHandler64, sizeof(MachInst) * numFillInsts);
427    initVirtMem->writeBlob(spillStart,
428            (uint8_t*)spillHandler64, sizeof(MachInst) *  numSpillInsts);
429}
430
431void
432Sparc32LiveProcess::argsInit(int intSize, int pageSize)
433{
434    SparcLiveProcess::argsInit<uint32_t>(pageSize);
435
436    // Stuff the trap handlers into the process address space
437    initVirtMem->writeBlob(fillStart,
438            (uint8_t*)fillHandler32, sizeof(MachInst) * numFillInsts);
439    initVirtMem->writeBlob(spillStart,
440            (uint8_t*)spillHandler32, sizeof(MachInst) *  numSpillInsts);
441}
442
443void Sparc32LiveProcess::flushWindows(ThreadContext *tc)
444{
445    IntReg Cansave = tc->readIntReg(NumIntArchRegs + 3);
446    IntReg Canrestore = tc->readIntReg(NumIntArchRegs + 4);
447    IntReg Otherwin = tc->readIntReg(NumIntArchRegs + 6);
448    MiscReg CWP = tc->readMiscReg(MISCREG_CWP);
449    MiscReg origCWP = CWP;
450    CWP = (CWP + Cansave + 2) % NWindows;
451    while(NWindows - 2 - Cansave != 0)
452    {
453        if (Otherwin) {
454            panic("Otherwin non-zero.\n");
455        } else {
456            tc->setMiscReg(MISCREG_CWP, CWP);
457            //Do the stores
458            IntReg sp = tc->readIntReg(StackPointerReg);
459            for (int index = 16; index < 32; index++) {
460                uint32_t regVal = tc->readIntReg(index);
461                regVal = htog(regVal);
462                if (!tc->getMemPort()->tryWriteBlob(
463                        sp + (index - 16) * 4, (uint8_t *)&regVal, 4)) {
464                    warn("Failed to save register to the stack when "
465                            "flushing windows.\n");
466                }
467            }
468            Canrestore--;
469            Cansave++;
470            CWP = (CWP + 1) % NWindows;
471        }
472    }
473    tc->setIntReg(NumIntArchRegs + 3, Cansave);
474    tc->setIntReg(NumIntArchRegs + 4, Canrestore);
475    tc->setMiscReg(MISCREG_CWP, origCWP);
476}
477
478void Sparc64LiveProcess::flushWindows(ThreadContext *tc)
479{
480    IntReg Cansave = tc->readIntReg(NumIntArchRegs + 3);
481    IntReg Canrestore = tc->readIntReg(NumIntArchRegs + 4);
482    IntReg Otherwin = tc->readIntReg(NumIntArchRegs + 6);
483    MiscReg CWP = tc->readMiscReg(MISCREG_CWP);
484    MiscReg origCWP = CWP;
485    CWP = (CWP + Cansave + 2) % NWindows;
486    while(NWindows - 2 - Cansave != 0)
487    {
488        if (Otherwin) {
489            panic("Otherwin non-zero.\n");
490        } else {
491            tc->setMiscReg(MISCREG_CWP, CWP);
492            //Do the stores
493            IntReg sp = tc->readIntReg(StackPointerReg);
494            for (int index = 16; index < 32; index++) {
495                IntReg regVal = tc->readIntReg(index);
496                regVal = htog(regVal);
497                if (!tc->getMemPort()->tryWriteBlob(
498                        sp + 2047 + (index - 16) * 8, (uint8_t *)&regVal, 8)) {
499                    warn("Failed to save register to the stack when "
500                            "flushing windows.\n");
501                }
502            }
503            Canrestore--;
504            Cansave++;
505            CWP = (CWP + 1) % NWindows;
506        }
507    }
508    tc->setIntReg(NumIntArchRegs + 3, Cansave);
509    tc->setIntReg(NumIntArchRegs + 4, Canrestore);
510    tc->setMiscReg(MISCREG_CWP, origCWP);
511}
512