process.cc revision 2976
12207SN/A/* 22207SN/A * Copyright (c) 2003-2004 The Regents of The University of Michigan 32207SN/A * All rights reserved. 42207SN/A * 52207SN/A * Redistribution and use in source and binary forms, with or without 62207SN/A * modification, are permitted provided that the following conditions are 72207SN/A * met: redistributions of source code must retain the above copyright 82207SN/A * notice, this list of conditions and the following disclaimer; 92207SN/A * redistributions in binary form must reproduce the above copyright 102207SN/A * notice, this list of conditions and the following disclaimer in the 112207SN/A * documentation and/or other materials provided with the distribution; 122207SN/A * neither the name of the copyright holders nor the names of its 132207SN/A * contributors may be used to endorse or promote products derived from 142207SN/A * this software without specific prior written permission. 152207SN/A * 162207SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172207SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182207SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192207SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202207SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212207SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222207SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232207SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242207SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252207SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262207SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272665Ssaidi@eecs.umich.edu * 282665Ssaidi@eecs.umich.edu * Authors: Gabe Black 292665Ssaidi@eecs.umich.edu * Ali Saidi 302207SN/A */ 312207SN/A 322474SN/A#include "arch/sparc/isa_traits.hh" 332207SN/A#include "arch/sparc/process.hh" 342454SN/A#include "base/loader/object_file.hh" 352976Sgblack@eecs.umich.edu#include "base/loader/elf_object.hh" 362454SN/A#include "base/misc.hh" 372680Sktlim@umich.edu#include "cpu/thread_context.hh" 382561SN/A#include "mem/page_table.hh" 392561SN/A#include "mem/translating_port.hh" 402474SN/A#include "sim/system.hh" 412207SN/A 422458SN/Ausing namespace std; 432474SN/Ausing namespace SparcISA; 442458SN/A 452207SN/A 462474SN/ASparcLiveProcess::SparcLiveProcess(const std::string &nm, ObjectFile *objFile, 472474SN/A System *_system, int stdin_fd, int stdout_fd, int stderr_fd, 482474SN/A std::vector<std::string> &argv, std::vector<std::string> &envp) 492474SN/A : LiveProcess(nm, objFile, _system, stdin_fd, stdout_fd, stderr_fd, 502474SN/A argv, envp) 512474SN/A{ 522474SN/A 532474SN/A // XXX all the below need to be updated for SPARC - Ali 542474SN/A brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize(); 552474SN/A brk_point = roundUp(brk_point, VMPageSize); 562474SN/A 572561SN/A // Set up stack. On SPARC Linux, stack goes from the top of memory 582561SN/A // downward, less the hole for the kernel address space. 592588SN/A stack_base = ((Addr)0x80000000000ULL); 602474SN/A 612474SN/A // Set up region for mmaps. Tru64 seems to start just above 0 and 622474SN/A // grow up from there. 632585SN/A mmap_start = mmap_end = 0x800000; 642474SN/A 652474SN/A // Set pointer for next thread stack. Reserve 8M for main stack. 662474SN/A next_thread_stack_base = stack_base - (8 * 1024 * 1024); 672474SN/A} 682474SN/A 692474SN/Avoid 702474SN/ASparcLiveProcess::startup() 712474SN/A{ 722474SN/A argsInit(MachineBytes, VMPageSize); 732561SN/A 742561SN/A //From the SPARC ABI 752561SN/A 762561SN/A //The process runs in user mode 772680Sktlim@umich.edu threadContexts[0]->setMiscRegWithEffect(MISCREG_PSTATE, 0x02); 782561SN/A 792646Ssaidi@eecs.umich.edu //Setup default FP state 802680Sktlim@umich.edu threadContexts[0]->setMiscReg(MISCREG_FSR, 0); 812646Ssaidi@eecs.umich.edu 822680Sktlim@umich.edu threadContexts[0]->setMiscReg(MISCREG_TICK, 0); 832646Ssaidi@eecs.umich.edu // 842561SN/A /* 852561SN/A * Register window management registers 862561SN/A */ 872561SN/A 882561SN/A //No windows contain info from other programs 892680Sktlim@umich.edu threadContexts[0]->setMiscRegWithEffect(MISCREG_OTHERWIN, 0); 902561SN/A //There are no windows to pop 912680Sktlim@umich.edu threadContexts[0]->setMiscRegWithEffect(MISCREG_CANRESTORE, 0); 922561SN/A //All windows are available to save into 932680Sktlim@umich.edu threadContexts[0]->setMiscRegWithEffect(MISCREG_CANSAVE, NWindows - 2); 942561SN/A //All windows are "clean" 952680Sktlim@umich.edu threadContexts[0]->setMiscRegWithEffect(MISCREG_CLEANWIN, NWindows); 962561SN/A //Start with register window 0 972680Sktlim@umich.edu threadContexts[0]->setMiscRegWithEffect(MISCREG_CWP, 0); 982474SN/A} 992474SN/A 1002585SN/Am5_auxv_t buildAuxVect(int64_t type, int64_t val) 1012585SN/A{ 1022585SN/A m5_auxv_t result; 1032585SN/A result.a_type = TheISA::htog(type); 1042585SN/A result.a_val = TheISA::htog(val); 1052585SN/A return result; 1062585SN/A} 1072585SN/A 1082561SN/Avoid 1092561SN/ASparcLiveProcess::argsInit(int intSize, int pageSize) 1102561SN/A{ 1112561SN/A Process::startup(); 1122474SN/A 1132561SN/A Addr alignmentMask = ~(intSize - 1); 1142561SN/A 1152561SN/A // load object file into target memory 1162561SN/A objFile->loadSections(initVirtMem); 1172561SN/A 1182585SN/A //These are the auxilliary vector types 1192585SN/A enum auxTypes 1202585SN/A { 1212585SN/A SPARC_AT_HWCAP = 16, 1222585SN/A SPARC_AT_PAGESZ = 6, 1232585SN/A SPARC_AT_CLKTCK = 17, 1242585SN/A SPARC_AT_PHDR = 3, 1252585SN/A SPARC_AT_PHENT = 4, 1262585SN/A SPARC_AT_PHNUM = 5, 1272585SN/A SPARC_AT_BASE = 7, 1282585SN/A SPARC_AT_FLAGS = 8, 1292585SN/A SPARC_AT_ENTRY = 9, 1302585SN/A SPARC_AT_UID = 11, 1312585SN/A SPARC_AT_EUID = 12, 1322585SN/A SPARC_AT_GID = 13, 1332976Sgblack@eecs.umich.edu SPARC_AT_EGID = 14, 1342976Sgblack@eecs.umich.edu SPARC_AT_SECURE = 23 1352585SN/A }; 1362585SN/A 1372585SN/A enum hardwareCaps 1382585SN/A { 1392585SN/A M5_HWCAP_SPARC_FLUSH = 1, 1402585SN/A M5_HWCAP_SPARC_STBAR = 2, 1412585SN/A M5_HWCAP_SPARC_SWAP = 4, 1422585SN/A M5_HWCAP_SPARC_MULDIV = 8, 1432585SN/A M5_HWCAP_SPARC_V9 = 16, 1442585SN/A //This one should technically only be set 1452585SN/A //if there is a cheetah or cheetah_plus tlb, 1462585SN/A //but we'll use it all the time 1472585SN/A M5_HWCAP_SPARC_ULTRA3 = 32 1482585SN/A }; 1492585SN/A 1502585SN/A const int64_t hwcap = 1512585SN/A M5_HWCAP_SPARC_FLUSH | 1522585SN/A M5_HWCAP_SPARC_STBAR | 1532585SN/A M5_HWCAP_SPARC_SWAP | 1542585SN/A M5_HWCAP_SPARC_MULDIV | 1552585SN/A M5_HWCAP_SPARC_V9 | 1562585SN/A M5_HWCAP_SPARC_ULTRA3; 1572585SN/A 1582976Sgblack@eecs.umich.edu 1592976Sgblack@eecs.umich.edu //Setup the auxilliary vectors. These will already have endian conversion. 1602976Sgblack@eecs.umich.edu //Auxilliary vectors are loaded only for elf formatted executables. 1612976Sgblack@eecs.umich.edu ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile); 1622976Sgblack@eecs.umich.edu if(elfObject) 1632976Sgblack@eecs.umich.edu { 1642976Sgblack@eecs.umich.edu //Bits which describe the system hardware capabilities 1652976Sgblack@eecs.umich.edu auxv.push_back(buildAuxVect(SPARC_AT_HWCAP, hwcap)); 1662976Sgblack@eecs.umich.edu //The system page size 1672976Sgblack@eecs.umich.edu auxv.push_back(buildAuxVect(SPARC_AT_PAGESZ, SparcISA::VMPageSize)); 1682976Sgblack@eecs.umich.edu //Defined to be 100 in the kernel source. 1692976Sgblack@eecs.umich.edu //Frequency at which times() increments 1702976Sgblack@eecs.umich.edu auxv.push_back(buildAuxVect(SPARC_AT_CLKTCK, 100)); 1712976Sgblack@eecs.umich.edu // For statically linked executables, this is the virtual address of the 1722976Sgblack@eecs.umich.edu // program header tables if they appear in the executable image 1732976Sgblack@eecs.umich.edu auxv.push_back(buildAuxVect(SPARC_AT_PHDR, elfObject->programHeaderTable())); 1742976Sgblack@eecs.umich.edu // This is the size of a program header entry from the elf file. 1752976Sgblack@eecs.umich.edu auxv.push_back(buildAuxVect(SPARC_AT_PHENT, elfObject->programHeaderSize())); 1762976Sgblack@eecs.umich.edu // This is the number of program headers from the original elf file. 1772976Sgblack@eecs.umich.edu auxv.push_back(buildAuxVect(SPARC_AT_PHNUM, elfObject->programHeaderCount())); 1782976Sgblack@eecs.umich.edu //This is the address of the elf "interpreter", It should be set 1792976Sgblack@eecs.umich.edu //to 0 for regular executables. It should be something else 1802976Sgblack@eecs.umich.edu //(not sure what) for dynamic libraries. 1812976Sgblack@eecs.umich.edu auxv.push_back(buildAuxVect(SPARC_AT_BASE, 0)); 1822976Sgblack@eecs.umich.edu //This is hardwired to 0 in the elf loading code in the kernel 1832976Sgblack@eecs.umich.edu auxv.push_back(buildAuxVect(SPARC_AT_FLAGS, 0)); 1842976Sgblack@eecs.umich.edu //The entry point to the program 1852976Sgblack@eecs.umich.edu auxv.push_back(buildAuxVect(SPARC_AT_ENTRY, objFile->entryPoint())); 1862976Sgblack@eecs.umich.edu //Different user and group IDs 1872976Sgblack@eecs.umich.edu auxv.push_back(buildAuxVect(SPARC_AT_UID, 100)); 1882976Sgblack@eecs.umich.edu auxv.push_back(buildAuxVect(SPARC_AT_EUID, 100)); 1892976Sgblack@eecs.umich.edu auxv.push_back(buildAuxVect(SPARC_AT_GID, 100)); 1902976Sgblack@eecs.umich.edu auxv.push_back(buildAuxVect(SPARC_AT_EGID, 100)); 1912976Sgblack@eecs.umich.edu //Whether to enable "secure mode" in the executable 1922976Sgblack@eecs.umich.edu auxv.push_back(buildAuxVect(SPARC_AT_SECURE, 0)); 1932976Sgblack@eecs.umich.edu } 1942585SN/A 1952561SN/A //Figure out how big the initial stack needs to be 1962561SN/A 1972585SN/A //Each auxilliary vector is two 8 byte words 1982585SN/A int aux_data_size = 2 * intSize * auxv.size(); 1992561SN/A int env_data_size = 0; 2002561SN/A for (int i = 0; i < envp.size(); ++i) { 2012561SN/A env_data_size += envp[i].size() + 1; 2022561SN/A } 2032561SN/A int arg_data_size = 0; 2042561SN/A for (int i = 0; i < argv.size(); ++i) { 2052561SN/A arg_data_size += argv[i].size() + 1; 2062561SN/A } 2072561SN/A 2082561SN/A int aux_array_size = intSize * 2 * (auxv.size() + 1); 2092561SN/A 2102561SN/A int argv_array_size = intSize * (argv.size() + 1); 2112561SN/A int envp_array_size = intSize * (envp.size() + 1); 2122561SN/A 2132561SN/A int argc_size = intSize; 2142561SN/A int window_save_size = intSize * 16; 2152561SN/A 2162561SN/A int info_block_size = 2172561SN/A (aux_data_size + 2182561SN/A env_data_size + 2192561SN/A arg_data_size + 2202561SN/A ~alignmentMask) & alignmentMask; 2212561SN/A 2222561SN/A int info_block_padding = 2232561SN/A info_block_size - 2242561SN/A aux_data_size - 2252561SN/A env_data_size - 2262561SN/A arg_data_size; 2272561SN/A 2282561SN/A int space_needed = 2292561SN/A info_block_size + 2302561SN/A aux_array_size + 2312561SN/A envp_array_size + 2322561SN/A argv_array_size + 2332561SN/A argc_size + 2342561SN/A window_save_size; 2352561SN/A 2362561SN/A stack_min = stack_base - space_needed; 2372561SN/A stack_min &= alignmentMask; 2382561SN/A stack_size = stack_base - stack_min; 2392561SN/A 2402561SN/A // map memory 2412561SN/A pTable->allocate(roundDown(stack_min, pageSize), 2422561SN/A roundUp(stack_size, pageSize)); 2432561SN/A 2442561SN/A // map out initial stack contents 2452561SN/A Addr aux_data_base = stack_base - aux_data_size - info_block_padding; 2462561SN/A Addr env_data_base = aux_data_base - env_data_size; 2472561SN/A Addr arg_data_base = env_data_base - arg_data_size; 2482585SN/A Addr auxv_array_base = arg_data_base - aux_array_size; 2492585SN/A Addr envp_array_base = auxv_array_base - envp_array_size; 2502561SN/A Addr argv_array_base = envp_array_base - argv_array_size; 2512561SN/A Addr argc_base = argv_array_base - argc_size; 2522561SN/A Addr window_save_base = argc_base - window_save_size; 2532561SN/A 2542561SN/A DPRINTF(Sparc, "The addresses of items on the initial stack:\n"); 2552561SN/A DPRINTF(Sparc, "0x%x - aux data\n", aux_data_base); 2562561SN/A DPRINTF(Sparc, "0x%x - env data\n", env_data_base); 2572561SN/A DPRINTF(Sparc, "0x%x - arg data\n", arg_data_base); 2582585SN/A DPRINTF(Sparc, "0x%x - auxv array\n", auxv_array_base); 2592585SN/A DPRINTF(Sparc, "0x%x - envp array\n", envp_array_base); 2602585SN/A DPRINTF(Sparc, "0x%x - argv array\n", argv_array_base); 2612561SN/A DPRINTF(Sparc, "0x%x - argc \n", argc_base); 2622561SN/A DPRINTF(Sparc, "0x%x - window save\n", window_save_base); 2632561SN/A DPRINTF(Sparc, "0x%x - stack min\n", stack_min); 2642561SN/A 2652561SN/A // write contents to stack 2662561SN/A uint64_t argc = argv.size(); 2672585SN/A uint64_t guestArgc = TheISA::htog(argc); 2682561SN/A 2692585SN/A //Copy the aux stuff 2702585SN/A for(int x = 0; x < auxv.size(); x++) 2712585SN/A { 2722585SN/A initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize, 2732585SN/A (uint8_t*)&(auxv[x].a_type), intSize); 2742585SN/A initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize, 2752585SN/A (uint8_t*)&(auxv[x].a_val), intSize); 2762585SN/A } 2772585SN/A //Write out the terminating zeroed auxilliary vector 2782561SN/A const uint64_t zero = 0; 2792585SN/A initVirtMem->writeBlob(auxv_array_base + 2 * intSize * auxv.size(), 2802585SN/A (uint8_t*)&zero, 2 * intSize); 2812561SN/A 2822561SN/A copyStringArray(envp, envp_array_base, env_data_base, initVirtMem); 2832561SN/A copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem); 2842561SN/A 2852585SN/A initVirtMem->writeBlob(argc_base, (uint8_t*)&guestArgc, intSize); 2862561SN/A 2872680Sktlim@umich.edu threadContexts[0]->setIntReg(ArgumentReg0, argc); 2882680Sktlim@umich.edu threadContexts[0]->setIntReg(ArgumentReg1, argv_array_base); 2892680Sktlim@umich.edu threadContexts[0]->setIntReg(StackPointerReg, stack_min - StackBias); 2902561SN/A 2912561SN/A Addr prog_entry = objFile->entryPoint(); 2922680Sktlim@umich.edu threadContexts[0]->setPC(prog_entry); 2932680Sktlim@umich.edu threadContexts[0]->setNextPC(prog_entry + sizeof(MachInst)); 2942680Sktlim@umich.edu threadContexts[0]->setNextNPC(prog_entry + (2 * sizeof(MachInst))); 2952561SN/A 2962561SN/A// num_processes++; 2972561SN/A} 298