process.cc revision 11905:4a771f8756ad
1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * Copyright (c) 2016 The University of Virginia 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer; 10 * redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution; 13 * neither the name of the copyright holders nor the names of its 14 * contributors may be used to endorse or promote products derived from 15 * this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 * 29 * Authors: Gabe Black 30 * Ali Saidi 31 * Korey Sewell 32 * Alec Roelke 33 */ 34#include "arch/riscv/process.hh" 35 36#include <vector> 37 38#include "arch/riscv/isa_traits.hh" 39#include "base/loader/elf_object.hh" 40#include "base/loader/object_file.hh" 41#include "base/misc.hh" 42#include "cpu/thread_context.hh" 43#include "debug/Loader.hh" 44#include "mem/page_table.hh" 45#include "sim/aux_vector.hh" 46#include "sim/process.hh" 47#include "sim/process_impl.hh" 48#include "sim/syscall_return.hh" 49#include "sim/system.hh" 50 51using namespace std; 52using namespace RiscvISA; 53 54RiscvProcess::RiscvProcess(ProcessParams * params, 55 ObjectFile *objFile) : Process(params, objFile) 56{ 57 // Set up stack. On RISC-V, stack starts at the top of kuseg 58 // user address space. RISC-V stack grows down from here 59 Addr stack_base = 0x7FFFFFFF; 60 61 Addr max_stack_size = 8 * 1024 * 1024; 62 63 // Set pointer for next thread stack. Reserve 8M for main stack. 64 Addr next_thread_stack_base = stack_base - max_stack_size; 65 66 // Set up break point (Top of Heap) 67 Addr brk_point = objFile->bssBase() + objFile->bssSize(); 68 69 // Set up region for mmaps. Start it 1GB above the top of the heap. 70 Addr mmap_end = brk_point + 0x40000000L; 71 72 memState = make_shared<MemState>(brk_point, stack_base, max_stack_size, 73 next_thread_stack_base, mmap_end); 74} 75 76void 77RiscvProcess::initState() 78{ 79 Process::initState(); 80 81 argsInit<uint64_t>(PageBytes); 82} 83 84template<class IntType> void 85RiscvProcess::argsInit(int pageSize) 86{ 87 updateBias(); 88 89 // load object file into target memory 90 objFile->loadSections(initVirtMem); 91 92 typedef AuxVector<IntType> auxv_t; 93 vector<auxv_t> auxv; 94 ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile); 95 if (elfObject) { 96 // Set the system page size 97 auxv.push_back(auxv_t(M5_AT_PAGESZ, RiscvISA::PageBytes)); 98 // Set the frequency at which time() increments 99 auxv.push_back(auxv_t(M5_AT_CLKTCK, 100)); 100 // For statically linked executables, this is the virtual 101 // address of the program header tables if they appear in the 102 // executable image. 103 auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable())); 104 DPRINTF(Loader, "auxv at PHDR %08p\n", 105 elfObject->programHeaderTable()); 106 // This is the size of a program header entry from the elf file. 107 auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize())); 108 // This is the number of program headers from the original elf file. 109 auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount())); 110 auxv.push_back(auxv_t(M5_AT_BASE, getBias())); 111 //The entry point to the program 112 auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint())); 113 //Different user and group IDs 114 auxv.push_back(auxv_t(M5_AT_UID, uid())); 115 auxv.push_back(auxv_t(M5_AT_EUID, euid())); 116 auxv.push_back(auxv_t(M5_AT_GID, gid())); 117 auxv.push_back(auxv_t(M5_AT_EGID, egid())); 118 } 119 120 const IntType zero = 0; 121 IntType argc = htog((IntType)argv.size()); 122 int argv_array_size = sizeof(Addr) * argv.size(); 123 int arg_data_size = 0; 124 for (string arg: argv) 125 arg_data_size += arg.size() + 1; 126 int envp_array_size = sizeof(Addr) * envp.size(); 127 int env_data_size = 0; 128 for (string env: envp) 129 env_data_size += env.size() + 1; 130 int auxv_array_size = 2 * sizeof(IntType)*auxv.size(); 131 132 Addr stack_size = sizeof(IntType) + argv_array_size + 2 * sizeof(Addr) + 133 sizeof(Addr) + arg_data_size + 2 * sizeof(Addr); 134 if (!envp.empty()) { 135 stack_size += 2 * sizeof(Addr) + envp_array_size + 2 * 136 sizeof(Addr) + env_data_size; 137 } 138 if (!auxv.empty()) 139 stack_size += 2 * sizeof(Addr) + auxv_array_size; 140 141 memState->setStackSize(stack_size); 142 143 Addr stack_min = roundDown(memState->getStackBase() - 144 stack_size, pageSize); 145 allocateMem(stack_min, roundUp(memState->getStackSize(), pageSize)); 146 147 memState->setStackMin(stack_min); 148 149 Addr argv_array_base = memState->getStackMin() + sizeof(IntType); 150 Addr arg_data_base = argv_array_base + argv_array_size + 2 * sizeof(Addr); 151 Addr envp_array_base = arg_data_base + arg_data_size; 152 if (!envp.empty()) 153 envp_array_base += 2 * sizeof(Addr); 154 Addr env_data_base = envp_array_base + envp_array_size; 155 if (!envp.empty()) 156 env_data_base += 2 * sizeof(Addr); 157 158 vector<Addr> arg_pointers; 159 if (!argv.empty()) { 160 arg_pointers.push_back(arg_data_base); 161 for (int i = 0; i < argv.size() - 1; i++) { 162 arg_pointers.push_back(arg_pointers[i] + argv[i].size() + 1); 163 } 164 } 165 166 vector<Addr> env_pointers; 167 if (!envp.empty()) { 168 env_pointers.push_back(env_data_base); 169 for (int i = 0; i < envp.size() - 1; i++) { 170 env_pointers.push_back(env_pointers[i] + envp[i].size() + 1); 171 } 172 } 173 174 Addr sp = memState->getStackMin(); 175 initVirtMem.writeBlob(sp, (uint8_t *)&argc, sizeof(IntType)); 176 sp += sizeof(IntType); 177 for (Addr arg_pointer: arg_pointers) { 178 initVirtMem.writeBlob(sp, (uint8_t *)&arg_pointer, sizeof(Addr)); 179 sp += sizeof(Addr); 180 } 181 for (int i = 0; i < 2; i++) { 182 initVirtMem.writeBlob(sp, (uint8_t *)&zero, sizeof(Addr)); 183 sp += sizeof(Addr); 184 } 185 for (int i = 0; i < argv.size(); i++) { 186 initVirtMem.writeString(sp, argv[i].c_str()); 187 sp += argv[i].size() + 1; 188 } 189 if (!envp.empty()) { 190 for (int i = 0; i < 2; i++) { 191 initVirtMem.writeBlob(sp, (uint8_t *)&zero, sizeof(Addr)); 192 sp += sizeof(Addr); 193 } 194 } 195 for (Addr env_pointer: env_pointers) 196 initVirtMem.writeBlob(sp, (uint8_t *)&env_pointer, sizeof(Addr)); 197 if (!envp.empty()) { 198 for (int i = 0; i < 2; i++) { 199 initVirtMem.writeBlob(sp, (uint8_t *)&zero, sizeof(Addr)); 200 sp += sizeof(Addr); 201 } 202 } 203 for (int i = 0; i < envp.size(); i++) { 204 initVirtMem.writeString(sp, envp[i].c_str()); 205 sp += envp[i].size() + 1; 206 } 207 if (!auxv.empty()) { 208 for (int i = 0; i < 2; i++) { 209 initVirtMem.writeBlob(sp, (uint8_t *)&zero, sizeof(Addr)); 210 sp += sizeof(Addr); 211 } 212 } 213 for (auxv_t aux: auxv) { 214 initVirtMem.writeBlob(sp, (uint8_t *)&aux.a_type, sizeof(IntType)); 215 initVirtMem.writeBlob(sp + sizeof(IntType), (uint8_t *)&aux.a_val, 216 sizeof(IntType)); 217 sp += 2 * sizeof(IntType); 218 } 219 for (int i = 0; i < 2; i++) { 220 initVirtMem.writeBlob(sp, (uint8_t *)&zero, sizeof(Addr)); 221 sp += sizeof(Addr); 222 } 223 224 ThreadContext *tc = system->getThreadContext(contextIds[0]); 225 tc->setIntReg(StackPointerReg, memState->getStackMin()); 226 tc->pcState(getStartPC()); 227} 228 229RiscvISA::IntReg 230RiscvProcess::getSyscallArg(ThreadContext *tc, int &i) 231{ 232 // RISC-V only has four system call argument registers by convention, so 233 // if a larger index is requested return 0 234 RiscvISA::IntReg retval = 0; 235 if (i < 4) 236 retval = tc->readIntReg(SyscallArgumentRegs[i]); 237 i++; 238 return retval; 239} 240 241void 242RiscvProcess::setSyscallArg(ThreadContext *tc, int i, RiscvISA::IntReg val) 243{ 244 tc->setIntReg(SyscallArgumentRegs[i], val); 245} 246 247void 248RiscvProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret) 249{ 250 if (sysret.successful()) { 251 // no error 252 tc->setIntReg(SyscallPseudoReturnReg, sysret.returnValue()); 253 } else { 254 // got an error, return details 255 tc->setIntReg(SyscallPseudoReturnReg, sysret.errnoValue()); 256 } 257} 258