process.cc revision 11723
1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * Copyright (c) 2016 The University of Virginia 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer; 10 * redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution; 13 * neither the name of the copyright holders nor the names of its 14 * contributors may be used to endorse or promote products derived from 15 * this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 * 29 * Authors: Gabe Black 30 * Ali Saidi 31 * Korey Sewell 32 * Alec Roelke 33 */ 34#include "arch/riscv/process.hh" 35 36#include <vector> 37 38#include "arch/riscv/isa_traits.hh" 39#include "base/loader/elf_object.hh" 40#include "base/loader/object_file.hh" 41#include "base/misc.hh" 42#include "cpu/thread_context.hh" 43#include "debug/Loader.hh" 44#include "mem/page_table.hh" 45#include "sim/process.hh" 46#include "sim/process_impl.hh" 47#include "sim/system.hh" 48 49using namespace std; 50using namespace RiscvISA; 51 52RiscvLiveProcess::RiscvLiveProcess(LiveProcessParams * params, 53 ObjectFile *objFile) : LiveProcess(params, objFile) 54{ 55 // Set up stack. On RISC-V, stack starts at the top of kuseg 56 // user address space. RISC-V stack grows down from here 57 stack_base = 0x7FFFFFFF; 58 59 // Set pointer for next thread stack. Reserve 8M for main stack. 60 next_thread_stack_base = stack_base - (8 * 1024 * 1024); 61 62 // Set up break point (Top of Heap) 63 brk_point = objFile->bssBase() + objFile->bssSize(); 64 65 // Set up region for mmaps. Start it 1GB above the top of the heap. 66 mmap_end = brk_point + 0x40000000L; 67} 68 69void 70RiscvLiveProcess::initState() 71{ 72 LiveProcess::initState(); 73 74 argsInit<uint64_t>(PageBytes); 75} 76 77template<class IntType> void 78RiscvLiveProcess::argsInit(int pageSize) 79{ 80 updateBias(); 81 82 // load object file into target memory 83 objFile->loadSections(initVirtMem); 84 85 typedef AuxVector<IntType> auxv_t; 86 vector<auxv_t> auxv; 87 ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile); 88 if (elfObject) { 89 // Set the system page size 90 auxv.push_back(auxv_t(M5_AT_PAGESZ, RiscvISA::PageBytes)); 91 // Set the frequency at which time() increments 92 auxv.push_back(auxv_t(M5_AT_CLKTCK, 100)); 93 // For statically linked executables, this is the virtual 94 // address of the program header tables if they appear in the 95 // executable image. 96 auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable())); 97 DPRINTF(Loader, "auxv at PHDR %08p\n", 98 elfObject->programHeaderTable()); 99 // This is the size of a program header entry from the elf file. 100 auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize())); 101 // This is the number of program headers from the original elf file. 102 auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount())); 103 auxv.push_back(auxv_t(M5_AT_BASE, getBias())); 104 //The entry point to the program 105 auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint())); 106 //Different user and group IDs 107 auxv.push_back(auxv_t(M5_AT_UID, uid())); 108 auxv.push_back(auxv_t(M5_AT_EUID, euid())); 109 auxv.push_back(auxv_t(M5_AT_GID, gid())); 110 auxv.push_back(auxv_t(M5_AT_EGID, egid())); 111 } 112 113 const IntType zero = 0; 114 IntType argc = htog((IntType)argv.size()); 115 int argv_array_size = sizeof(Addr) * argv.size(); 116 int arg_data_size = 0; 117 for (string arg: argv) 118 arg_data_size += arg.size() + 1; 119 int envp_array_size = sizeof(Addr) * envp.size(); 120 int env_data_size = 0; 121 for (string env: envp) 122 env_data_size += env.size() + 1; 123 int auxv_array_size = 2 * sizeof(IntType)*auxv.size(); 124 125 stack_size = sizeof(IntType) + argv_array_size + 2 * sizeof(Addr) + 126 arg_data_size + 2 * sizeof(Addr); 127 if (!envp.empty()) { 128 stack_size += 2 * sizeof(Addr) + envp_array_size + 2 * sizeof(Addr) + 129 env_data_size; 130 } 131 if (!auxv.empty()) 132 stack_size += 2 * sizeof(Addr) + auxv_array_size; 133 stack_min = roundDown(stack_base - stack_size, pageSize); 134 allocateMem(stack_min, roundUp(stack_size, pageSize)); 135 136 Addr argv_array_base = stack_min + sizeof(IntType); 137 Addr arg_data_base = argv_array_base + argv_array_size + 2 * sizeof(Addr); 138 Addr envp_array_base = arg_data_base + arg_data_size; 139 if (!envp.empty()) 140 envp_array_base += 2 * sizeof(Addr); 141 Addr env_data_base = envp_array_base + envp_array_size; 142 if (!envp.empty()) 143 env_data_base += 2 * sizeof(Addr); 144 145 vector<Addr> arg_pointers; 146 if (!argv.empty()) { 147 arg_pointers.push_back(arg_data_base); 148 for (int i = 0; i < argv.size() - 1; i++) { 149 arg_pointers.push_back(arg_pointers[i] + argv[i].size() + 1); 150 } 151 } 152 153 vector<Addr> env_pointers; 154 if (!envp.empty()) { 155 env_pointers.push_back(env_data_base); 156 for (int i = 0; i < envp.size() - 1; i++) { 157 env_pointers.push_back(env_pointers[i] + envp[i].size() + 1); 158 } 159 } 160 161 Addr sp = stack_min; 162 initVirtMem.writeBlob(sp, (uint8_t *)&argc, sizeof(IntType)); 163 sp += sizeof(IntType); 164 for (Addr arg_pointer: arg_pointers) { 165 initVirtMem.writeBlob(sp, (uint8_t *)&arg_pointer, sizeof(Addr)); 166 sp += sizeof(Addr); 167 } 168 for (int i = 0; i < 2; i++) { 169 initVirtMem.writeBlob(sp, (uint8_t *)&zero, sizeof(Addr)); 170 sp += sizeof(Addr); 171 } 172 for (int i = 0; i < argv.size(); i++) { 173 initVirtMem.writeString(sp, argv[i].c_str()); 174 sp += argv[i].size() + 1; 175 } 176 if (!envp.empty()) { 177 for (int i = 0; i < 2; i++) { 178 initVirtMem.writeBlob(sp, (uint8_t *)&zero, sizeof(Addr)); 179 sp += sizeof(Addr); 180 } 181 } 182 for (Addr env_pointer: env_pointers) 183 initVirtMem.writeBlob(sp, (uint8_t *)&env_pointer, sizeof(Addr)); 184 if (!envp.empty()) { 185 for (int i = 0; i < 2; i++) { 186 initVirtMem.writeBlob(sp, (uint8_t *)&zero, sizeof(Addr)); 187 sp += sizeof(Addr); 188 } 189 } 190 for (int i = 0; i < envp.size(); i++) { 191 initVirtMem.writeString(sp, envp[i].c_str()); 192 sp += envp[i].size() + 1; 193 } 194 if (!auxv.empty()) { 195 for (int i = 0; i < 2; i++) { 196 initVirtMem.writeBlob(sp, (uint8_t *)&zero, sizeof(Addr)); 197 sp += sizeof(Addr); 198 } 199 } 200 for (auxv_t aux: auxv) { 201 initVirtMem.writeBlob(sp, (uint8_t *)&aux.a_type, sizeof(IntType)); 202 initVirtMem.writeBlob(sp + sizeof(IntType), (uint8_t *)&aux.a_val, 203 sizeof(IntType)); 204 sp += 2 * sizeof(IntType); 205 } 206 for (int i = 0; i < 2; i++) { 207 initVirtMem.writeBlob(sp, (uint8_t *)&zero, sizeof(Addr)); 208 sp += sizeof(Addr); 209 } 210 211 ThreadContext *tc = system->getThreadContext(contextIds[0]); 212 tc->setIntReg(StackPointerReg, stack_min); 213 tc->pcState(getStartPC()); 214} 215 216RiscvISA::IntReg 217RiscvLiveProcess::getSyscallArg(ThreadContext *tc, int &i) 218{ 219 return tc->readIntReg(SyscallArgumentRegs[i++]); 220} 221 222void 223RiscvLiveProcess::setSyscallArg(ThreadContext *tc, int i, RiscvISA::IntReg val) 224{ 225 tc->setIntReg(SyscallArgumentRegs[i], val); 226} 227 228void 229RiscvLiveProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret) 230{ 231 if (sysret.successful()) { 232 // no error 233 tc->setIntReg(SyscallPseudoReturnReg, sysret.returnValue()); 234 } else { 235 // got an error, return details 236 tc->setIntReg(SyscallPseudoReturnReg, sysret.errnoValue()); 237 } 238} 239