registers.hh revision 13611:c8b7847b4171 
1/*
2 * Copyright (c) 2009 The University of Edinburgh
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Timothy M. Jones
29 */
30
31#ifndef __ARCH_POWER_REGISTERS_HH__
32#define __ARCH_POWER_REGISTERS_HH__
33
34#include "arch/generic/vec_pred_reg.hh"
35#include "arch/generic/vec_reg.hh"
36#include "arch/power/generated/max_inst_regs.hh"
37#include "arch/power/miscregs.hh"
38#include "base/types.hh"
39
40namespace PowerISA {
41
42using PowerISAInst::MaxInstSrcRegs;
43using PowerISAInst::MaxInstDestRegs;
44
45// Power writes a misc register outside of the isa parser, so it can't
46// be detected by it. Manually add it here.
47const int MaxMiscDestRegs = PowerISAInst::MaxMiscDestRegs + 1;
48
49typedef RegVal IntReg;
50
51// Floating point register file entry type
52typedef RegVal FloatReg;
53typedef RegVal MiscReg;
54
55// dummy typedef since we don't have CC regs
56typedef uint8_t CCReg;
57
58// Not applicable to Power
59using VecElem = ::DummyVecElem;
60using VecReg = ::DummyVecReg;
61using ConstVecReg = ::DummyConstVecReg;
62using VecRegContainer = ::DummyVecRegContainer;
63constexpr unsigned NumVecElemPerVecReg = ::DummyNumVecElemPerVecReg;
64constexpr size_t VecRegSizeBytes = ::DummyVecRegSizeBytes;
65
66// Not applicable to Power
67using VecPredReg = ::DummyVecPredReg;
68using ConstVecPredReg = ::DummyConstVecPredReg;
69using VecPredRegContainer = ::DummyVecPredRegContainer;
70constexpr size_t VecPredRegSizeBits = ::DummyVecPredRegSizeBits;
71constexpr bool VecPredRegHasPackedRepr = ::DummyVecPredRegHasPackedRepr;
72
73// Constants Related to the number of registers
74const int NumIntArchRegs = 32;
75
76// CR, XER, LR, CTR, FPSCR, RSV, RSV-LEN, RSV-ADDR
77// and zero register, which doesn't actually exist but needs a number
78const int NumIntSpecialRegs = 9;
79const int NumFloatArchRegs = 32;
80const int NumFloatSpecialRegs = 0;
81const int NumInternalProcRegs = 0;
82
83const int NumIntRegs = NumIntArchRegs + NumIntSpecialRegs;
84const int NumFloatRegs = NumFloatArchRegs + NumFloatSpecialRegs;
85const int NumVecRegs = 1;  // Not applicable to Power
86                           // (1 to prevent warnings)
87const int NumVecPredRegs = 1;  // Not applicable to Power
88                               // (1 to prevent warnings)
89const int NumCCRegs = 0;
90const int NumMiscRegs = NUM_MISCREGS;
91
92// Semantically meaningful register indices
93const int ReturnValueReg = 3;
94const int ArgumentReg0 = 3;
95const int ArgumentReg1 = 4;
96const int ArgumentReg2 = 5;
97const int ArgumentReg3 = 6;
98const int ArgumentReg4 = 7;
99const int FramePointerReg = 31;
100const int StackPointerReg = 1;
101
102// There isn't one in Power, but we need to define one somewhere
103const int ZeroReg = NumIntRegs - 1;
104
105const int SyscallNumReg = 0;
106const int SyscallPseudoReturnReg = 3;
107const int SyscallSuccessReg = 3;
108
109enum MiscIntRegNums {
110    INTREG_CR = NumIntArchRegs,
111    INTREG_XER,
112    INTREG_LR,
113    INTREG_CTR,
114    INTREG_FPSCR,
115    INTREG_RSV,
116    INTREG_RSV_LEN,
117    INTREG_RSV_ADDR
118};
119
120} // namespace PowerISA
121
122#endif // __ARCH_POWER_REGISTERS_HH__
123