process.cc revision 14010:0e1e887507c0
16928SBrad.Beckmann@amd.com/* 26928SBrad.Beckmann@amd.com * Copyright (c) 2007-2008 The Florida State University 36928SBrad.Beckmann@amd.com * Copyright (c) 2009 The University of Edinburgh 46928SBrad.Beckmann@amd.com * All rights reserved. 56928SBrad.Beckmann@amd.com * 66928SBrad.Beckmann@amd.com * Redistribution and use in source and binary forms, with or without 76928SBrad.Beckmann@amd.com * modification, are permitted provided that the following conditions are 86928SBrad.Beckmann@amd.com * met: redistributions of source code must retain the above copyright 96928SBrad.Beckmann@amd.com * notice, this list of conditions and the following disclaimer; 106928SBrad.Beckmann@amd.com * redistributions in binary form must reproduce the above copyright 116928SBrad.Beckmann@amd.com * notice, this list of conditions and the following disclaimer in the 126928SBrad.Beckmann@amd.com * documentation and/or other materials provided with the distribution; 136928SBrad.Beckmann@amd.com * neither the name of the copyright holders nor the names of its 146928SBrad.Beckmann@amd.com * contributors may be used to endorse or promote products derived from 156928SBrad.Beckmann@amd.com * this software without specific prior written permission. 166928SBrad.Beckmann@amd.com * 176928SBrad.Beckmann@amd.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 186928SBrad.Beckmann@amd.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 196928SBrad.Beckmann@amd.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 206928SBrad.Beckmann@amd.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 216928SBrad.Beckmann@amd.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 226928SBrad.Beckmann@amd.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 236928SBrad.Beckmann@amd.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 246928SBrad.Beckmann@amd.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 256928SBrad.Beckmann@amd.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 266928SBrad.Beckmann@amd.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 276928SBrad.Beckmann@amd.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 286928SBrad.Beckmann@amd.com * 296928SBrad.Beckmann@amd.com * Authors: Stephen Hines 306928SBrad.Beckmann@amd.com * Timothy M. Jones 316928SBrad.Beckmann@amd.com */ 326928SBrad.Beckmann@amd.com 336928SBrad.Beckmann@amd.com#include "arch/power/process.hh" 346928SBrad.Beckmann@amd.com 356928SBrad.Beckmann@amd.com#include "arch/power/isa_traits.hh" 366928SBrad.Beckmann@amd.com#include "arch/power/types.hh" 3711670Sandreas.hansson@arm.com#include "base/loader/elf_object.hh" 386928SBrad.Beckmann@amd.com#include "base/loader/object_file.hh" 3911670Sandreas.hansson@arm.com#include "base/logging.hh" 4011682Sandreas.hansson@arm.com#include "cpu/thread_context.hh" 416928SBrad.Beckmann@amd.com#include "debug/Stack.hh" 426928SBrad.Beckmann@amd.com#include "mem/page_table.hh" 4311706Sandreas.hansson@arm.com#include "params/Process.hh" 446928SBrad.Beckmann@amd.com#include "sim/aux_vector.hh" 457570SBrad.Beckmann@amd.com#include "sim/process_impl.hh" 467570SBrad.Beckmann@amd.com#include "sim/syscall_return.hh" 476928SBrad.Beckmann@amd.com#include "sim/system.hh" 486928SBrad.Beckmann@amd.com 496928SBrad.Beckmann@amd.comusing namespace std; 506928SBrad.Beckmann@amd.comusing namespace PowerISA; 517570SBrad.Beckmann@amd.com 527570SBrad.Beckmann@amd.comPowerProcess::PowerProcess(ProcessParams *params, ObjectFile *objFile) 537570SBrad.Beckmann@amd.com : Process(params, 547570SBrad.Beckmann@amd.com new EmulationPageTable(params->name, params->pid, PageBytes), 557570SBrad.Beckmann@amd.com objFile) 567570SBrad.Beckmann@amd.com{ 577570SBrad.Beckmann@amd.com fatal_if(params->useArchPT, "Arch page tables not implemented."); 587570SBrad.Beckmann@amd.com // Set up break point (Top of Heap) 597570SBrad.Beckmann@amd.com Addr brk_point = objFile->dataBase() + objFile->dataSize() + 607570SBrad.Beckmann@amd.com objFile->bssSize(); 617570SBrad.Beckmann@amd.com brk_point = roundUp(brk_point, PageBytes); 629841Snilay@cs.wisc.edu 637570SBrad.Beckmann@amd.com Addr stack_base = 0xbf000000L; 648933SBrad.Beckmann@amd.com 658933SBrad.Beckmann@amd.com Addr max_stack_size = 8 * 1024 * 1024; 668933SBrad.Beckmann@amd.com 678933SBrad.Beckmann@amd.com // Set pointer for next thread stack. Reserve 8M for main stack. 688933SBrad.Beckmann@amd.com Addr next_thread_stack_base = stack_base - max_stack_size; 697570SBrad.Beckmann@amd.com 706928SBrad.Beckmann@amd.com // Set up region for mmaps. For now, start at bottom of kuseg space. 716928SBrad.Beckmann@amd.com Addr mmap_end = 0x70000000L; 728933SBrad.Beckmann@amd.com 738940SBrad.Beckmann@amd.com memState = make_shared<MemState>(brk_point, stack_base, max_stack_size, 746928SBrad.Beckmann@amd.com next_thread_stack_base, mmap_end); 7510300Scastilloe@unican.es} 7610300Scastilloe@unican.es 7710524Snilay@cs.wisc.eduvoid 7810300Scastilloe@unican.esPowerProcess::initState() 799827Sakash.bagdia@arm.com{ 809827Sakash.bagdia@arm.com Process::initState(); 819827Sakash.bagdia@arm.com 829827Sakash.bagdia@arm.com argsInit(MachineBytes, PageBytes); 836928SBrad.Beckmann@amd.com} 849826Sandreas.hansson@arm.com 859826Sandreas.hansson@arm.comvoid 8610519Snilay@cs.wisc.eduPowerProcess::argsInit(int intSize, int pageSize) 876928SBrad.Beckmann@amd.com{ 889793Sakash.bagdia@arm.com std::vector<AuxVector<uint32_t>> auxv; 899827Sakash.bagdia@arm.com 909827Sakash.bagdia@arm.com string filename; 919793Sakash.bagdia@arm.com if (argv.size() < 1) 9210120Snilay@cs.wisc.edu filename = ""; 936928SBrad.Beckmann@amd.com else 9411267SBrad.Beckmann@amd.com filename = argv[0]; 9511267SBrad.Beckmann@amd.com 966928SBrad.Beckmann@amd.com //We want 16 byte alignment 976928SBrad.Beckmann@amd.com uint64_t align = 16; 986928SBrad.Beckmann@amd.com 996928SBrad.Beckmann@amd.com // Patch the ld_bias for dynamic executables. 1006928SBrad.Beckmann@amd.com updateBias(); 1016928SBrad.Beckmann@amd.com 10210120Snilay@cs.wisc.edu // load object file into target memory 1036928SBrad.Beckmann@amd.com objFile->loadSections(initVirtMem); 1048940SBrad.Beckmann@amd.com 1056928SBrad.Beckmann@amd.com //Setup the auxilliary vectors. These will already have endian conversion. 10611267SBrad.Beckmann@amd.com //Auxilliary vectors are loaded only for elf formatted executables. 10711267SBrad.Beckmann@amd.com ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile); 10811267SBrad.Beckmann@amd.com if (elfObject) { 10911267SBrad.Beckmann@amd.com uint32_t features = 0; 11011267SBrad.Beckmann@amd.com 11111267SBrad.Beckmann@amd.com //Bits which describe the system hardware capabilities 11211267SBrad.Beckmann@amd.com //XXX Figure out what these should be 11311267SBrad.Beckmann@amd.com auxv.emplace_back(M5_AT_HWCAP, features); 11411267SBrad.Beckmann@amd.com //The system page size 1156928SBrad.Beckmann@amd.com auxv.emplace_back(M5_AT_PAGESZ, PowerISA::PageBytes); 1166928SBrad.Beckmann@amd.com //Frequency at which times() increments 1176928SBrad.Beckmann@amd.com auxv.emplace_back(M5_AT_CLKTCK, 0x64); 1186928SBrad.Beckmann@amd.com // For statically linked executables, this is the virtual address of 1196928SBrad.Beckmann@amd.com // the program header tables if they appear in the executable image 1206928SBrad.Beckmann@amd.com auxv.emplace_back(M5_AT_PHDR, elfObject->programHeaderTable()); 1216928SBrad.Beckmann@amd.com // This is the size of a program header entry from the elf file. 1226928SBrad.Beckmann@amd.com auxv.emplace_back(M5_AT_PHENT, elfObject->programHeaderSize()); 1236928SBrad.Beckmann@amd.com // This is the number of program headers from the original elf file. 1246928SBrad.Beckmann@amd.com auxv.emplace_back(M5_AT_PHNUM, elfObject->programHeaderCount()); 1256928SBrad.Beckmann@amd.com // This is the base address of the ELF interpreter; it should be 1268801Sgblack@eecs.umich.edu // zero for static executables or contain the base address for 1276928SBrad.Beckmann@amd.com // dynamic executables. 128 auxv.emplace_back(M5_AT_BASE, getBias()); 129 //XXX Figure out what this should be. 130 auxv.emplace_back(M5_AT_FLAGS, 0); 131 //The entry point to the program 132 auxv.emplace_back(M5_AT_ENTRY, objFile->entryPoint()); 133 //Different user and group IDs 134 auxv.emplace_back(M5_AT_UID, uid()); 135 auxv.emplace_back(M5_AT_EUID, euid()); 136 auxv.emplace_back(M5_AT_GID, gid()); 137 auxv.emplace_back(M5_AT_EGID, egid()); 138 //Whether to enable "secure mode" in the executable 139 auxv.emplace_back(M5_AT_SECURE, 0); 140 //The filename of the program 141 auxv.emplace_back(M5_AT_EXECFN, 0); 142 //The string "v51" with unknown meaning 143 auxv.emplace_back(M5_AT_PLATFORM, 0); 144 } 145 146 //Figure out how big the initial stack nedes to be 147 148 // A sentry NULL void pointer at the top of the stack. 149 int sentry_size = intSize; 150 151 string platform = "v51"; 152 int platform_size = platform.size() + 1; 153 154 // The aux vectors are put on the stack in two groups. The first group are 155 // the vectors that are generated as the elf is loaded. The second group 156 // are the ones that were computed ahead of time and include the platform 157 // string. 158 int aux_data_size = filename.size() + 1; 159 160 int env_data_size = 0; 161 for (int i = 0; i < envp.size(); ++i) { 162 env_data_size += envp[i].size() + 1; 163 } 164 int arg_data_size = 0; 165 for (int i = 0; i < argv.size(); ++i) { 166 arg_data_size += argv[i].size() + 1; 167 } 168 169 int info_block_size = 170 sentry_size + env_data_size + arg_data_size + 171 aux_data_size + platform_size; 172 173 //Each auxilliary vector is two 4 byte words 174 int aux_array_size = intSize * 2 * (auxv.size() + 1); 175 176 int envp_array_size = intSize * (envp.size() + 1); 177 int argv_array_size = intSize * (argv.size() + 1); 178 179 int argc_size = intSize; 180 181 //Figure out the size of the contents of the actual initial frame 182 int frame_size = 183 info_block_size + 184 aux_array_size + 185 envp_array_size + 186 argv_array_size + 187 argc_size; 188 189 //There needs to be padding after the auxiliary vector data so that the 190 //very bottom of the stack is aligned properly. 191 int partial_size = frame_size; 192 int aligned_partial_size = roundUp(partial_size, align); 193 int aux_padding = aligned_partial_size - partial_size; 194 195 int space_needed = frame_size + aux_padding; 196 197 Addr stack_min = memState->getStackBase() - space_needed; 198 stack_min = roundDown(stack_min, align); 199 200 memState->setStackSize(memState->getStackBase() - stack_min); 201 202 // map memory 203 allocateMem(roundDown(stack_min, pageSize), 204 roundUp(memState->getStackSize(), pageSize)); 205 206 // map out initial stack contents 207 uint32_t sentry_base = memState->getStackBase() - sentry_size; 208 uint32_t aux_data_base = sentry_base - aux_data_size; 209 uint32_t env_data_base = aux_data_base - env_data_size; 210 uint32_t arg_data_base = env_data_base - arg_data_size; 211 uint32_t platform_base = arg_data_base - platform_size; 212 uint32_t auxv_array_base = platform_base - aux_array_size - aux_padding; 213 uint32_t envp_array_base = auxv_array_base - envp_array_size; 214 uint32_t argv_array_base = envp_array_base - argv_array_size; 215 uint32_t argc_base = argv_array_base - argc_size; 216 217 DPRINTF(Stack, "The addresses of items on the initial stack:\n"); 218 DPRINTF(Stack, "0x%x - aux data\n", aux_data_base); 219 DPRINTF(Stack, "0x%x - env data\n", env_data_base); 220 DPRINTF(Stack, "0x%x - arg data\n", arg_data_base); 221 DPRINTF(Stack, "0x%x - platform base\n", platform_base); 222 DPRINTF(Stack, "0x%x - auxv array\n", auxv_array_base); 223 DPRINTF(Stack, "0x%x - envp array\n", envp_array_base); 224 DPRINTF(Stack, "0x%x - argv array\n", argv_array_base); 225 DPRINTF(Stack, "0x%x - argc \n", argc_base); 226 DPRINTF(Stack, "0x%x - stack min\n", stack_min); 227 228 // write contents to stack 229 230 // figure out argc 231 uint32_t argc = argv.size(); 232 uint32_t guestArgc = PowerISA::htog(argc); 233 234 //Write out the sentry void * 235 uint32_t sentry_NULL = 0; 236 initVirtMem.writeBlob(sentry_base, &sentry_NULL, sentry_size); 237 238 //Fix up the aux vectors which point to other data 239 for (int i = auxv.size() - 1; i >= 0; i--) { 240 if (auxv[i].type == M5_AT_PLATFORM) { 241 auxv[i].val = platform_base; 242 initVirtMem.writeString(platform_base, platform.c_str()); 243 } else if (auxv[i].type == M5_AT_EXECFN) { 244 auxv[i].val = aux_data_base; 245 initVirtMem.writeString(aux_data_base, filename.c_str()); 246 } 247 } 248 249 //Copy the aux stuff 250 Addr auxv_array_end = auxv_array_base; 251 for (const auto &aux: auxv) { 252 initVirtMem.write(auxv_array_end, aux, GuestByteOrder); 253 auxv_array_end += sizeof(aux); 254 } 255 //Write out the terminating zeroed auxilliary vector 256 const AuxVector<uint64_t> zero(0, 0); 257 initVirtMem.write(auxv_array_end, zero); 258 auxv_array_end += sizeof(zero); 259 260 copyStringArray(envp, envp_array_base, env_data_base, initVirtMem); 261 copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem); 262 263 initVirtMem.writeBlob(argc_base, &guestArgc, intSize); 264 265 ThreadContext *tc = system->getThreadContext(contextIds[0]); 266 267 //Set the stack pointer register 268 tc->setIntReg(StackPointerReg, stack_min); 269 270 tc->pcState(getStartPC()); 271 272 //Align the "stack_min" to a page boundary. 273 memState->setStackMin(roundDown(stack_min, pageSize)); 274} 275 276RegVal 277PowerProcess::getSyscallArg(ThreadContext *tc, int &i) 278{ 279 assert(i < 5); 280 return tc->readIntReg(ArgumentReg0 + i++); 281} 282 283void 284PowerProcess::setSyscallArg(ThreadContext *tc, int i, RegVal val) 285{ 286 assert(i < 5); 287 tc->setIntReg(ArgumentReg0 + i, val); 288} 289 290void 291PowerProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret) 292{ 293 Cr cr = tc->readIntReg(INTREG_CR); 294 if (sysret.successful()) { 295 cr.cr0.so = 0; 296 } else { 297 cr.cr0.so = 1; 298 } 299 tc->setIntReg(INTREG_CR, cr); 300 tc->setIntReg(ReturnValueReg, sysret.encodedValue()); 301} 302