16691Stjones1@inf.ed.ac.uk/* 26691Stjones1@inf.ed.ac.uk * Copyright (c) 2002-2005 The Regents of The University of Michigan 36691Stjones1@inf.ed.ac.uk * Copyright (c) 2007 MIPS Technologies, Inc. 46691Stjones1@inf.ed.ac.uk * Copyright (c) 2007-2008 The Florida State University 56691Stjones1@inf.ed.ac.uk * Copyright (c) 2009 The University of Edinburgh 66691Stjones1@inf.ed.ac.uk * All rights reserved. 76691Stjones1@inf.ed.ac.uk * 86691Stjones1@inf.ed.ac.uk * Redistribution and use in source and binary forms, with or without 96691Stjones1@inf.ed.ac.uk * modification, are permitted provided that the following conditions are 106691Stjones1@inf.ed.ac.uk * met: redistributions of source code must retain the above copyright 116691Stjones1@inf.ed.ac.uk * notice, this list of conditions and the following disclaimer; 126691Stjones1@inf.ed.ac.uk * redistributions in binary form must reproduce the above copyright 136691Stjones1@inf.ed.ac.uk * notice, this list of conditions and the following disclaimer in the 146691Stjones1@inf.ed.ac.uk * documentation and/or other materials provided with the distribution; 156691Stjones1@inf.ed.ac.uk * neither the name of the copyright holders nor the names of its 166691Stjones1@inf.ed.ac.uk * contributors may be used to endorse or promote products derived from 176691Stjones1@inf.ed.ac.uk * this software without specific prior written permission. 186691Stjones1@inf.ed.ac.uk * 196691Stjones1@inf.ed.ac.uk * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 206691Stjones1@inf.ed.ac.uk * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 216691Stjones1@inf.ed.ac.uk * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 226691Stjones1@inf.ed.ac.uk * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 236691Stjones1@inf.ed.ac.uk * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 246691Stjones1@inf.ed.ac.uk * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 256691Stjones1@inf.ed.ac.uk * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 266691Stjones1@inf.ed.ac.uk * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 276691Stjones1@inf.ed.ac.uk * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 286691Stjones1@inf.ed.ac.uk * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 296691Stjones1@inf.ed.ac.uk * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 306691Stjones1@inf.ed.ac.uk * 316691Stjones1@inf.ed.ac.uk * Authors: Nathan Binkert 326691Stjones1@inf.ed.ac.uk * Steve Reinhardt 336691Stjones1@inf.ed.ac.uk * Jaidev Patwardhan 346691Stjones1@inf.ed.ac.uk * Stephen Hines 356691Stjones1@inf.ed.ac.uk * Timothy M. Jones 366691Stjones1@inf.ed.ac.uk */ 376691Stjones1@inf.ed.ac.uk 386691Stjones1@inf.ed.ac.uk#ifndef __ARCH_POWER_PAGETABLE_H__ 396691Stjones1@inf.ed.ac.uk#define __ARCH_POWER_PAGETABLE_H__ 406691Stjones1@inf.ed.ac.uk 416691Stjones1@inf.ed.ac.uk#include "arch/power/isa_traits.hh" 426691Stjones1@inf.ed.ac.uk#include "arch/power/utility.hh" 436691Stjones1@inf.ed.ac.uk#include "arch/power/vtophys.hh" 446691Stjones1@inf.ed.ac.uk 456691Stjones1@inf.ed.ac.uknamespace PowerISA { 466691Stjones1@inf.ed.ac.uk 476691Stjones1@inf.ed.ac.ukstruct VAddr 486691Stjones1@inf.ed.ac.uk{ 496691Stjones1@inf.ed.ac.uk static const int ImplBits = 43; 506691Stjones1@inf.ed.ac.uk static const Addr ImplMask = (ULL(1) << ImplBits) - 1; 516691Stjones1@inf.ed.ac.uk static const Addr UnImplMask = ~ImplMask; 526691Stjones1@inf.ed.ac.uk 536691Stjones1@inf.ed.ac.uk Addr addr; 546691Stjones1@inf.ed.ac.uk 556691Stjones1@inf.ed.ac.uk VAddr(Addr a) 566691Stjones1@inf.ed.ac.uk : addr(a) 576691Stjones1@inf.ed.ac.uk {} 586691Stjones1@inf.ed.ac.uk 596691Stjones1@inf.ed.ac.uk operator Addr() const 606691Stjones1@inf.ed.ac.uk { 616691Stjones1@inf.ed.ac.uk return addr; 626691Stjones1@inf.ed.ac.uk } 636691Stjones1@inf.ed.ac.uk 646691Stjones1@inf.ed.ac.uk const VAddr 656691Stjones1@inf.ed.ac.uk &operator=(Addr a) 666691Stjones1@inf.ed.ac.uk { 676691Stjones1@inf.ed.ac.uk addr = a; 686691Stjones1@inf.ed.ac.uk return *this; 696691Stjones1@inf.ed.ac.uk } 706691Stjones1@inf.ed.ac.uk 716691Stjones1@inf.ed.ac.uk Addr 726691Stjones1@inf.ed.ac.uk vpn() const 736691Stjones1@inf.ed.ac.uk { 746691Stjones1@inf.ed.ac.uk return (addr & ImplMask) >> PageShift; 756691Stjones1@inf.ed.ac.uk } 766691Stjones1@inf.ed.ac.uk 776691Stjones1@inf.ed.ac.uk Addr 786691Stjones1@inf.ed.ac.uk page() const 796691Stjones1@inf.ed.ac.uk { 806691Stjones1@inf.ed.ac.uk return addr & Page_Mask; 816691Stjones1@inf.ed.ac.uk } 826691Stjones1@inf.ed.ac.uk 836691Stjones1@inf.ed.ac.uk Addr 846691Stjones1@inf.ed.ac.uk offset() const 856691Stjones1@inf.ed.ac.uk { 866691Stjones1@inf.ed.ac.uk return addr & PageOffset; 876691Stjones1@inf.ed.ac.uk } 886691Stjones1@inf.ed.ac.uk 896691Stjones1@inf.ed.ac.uk Addr 906691Stjones1@inf.ed.ac.uk level3() const 916691Stjones1@inf.ed.ac.uk { 926691Stjones1@inf.ed.ac.uk return PowerISA::PteAddr(addr >> PageShift); 936691Stjones1@inf.ed.ac.uk } 946691Stjones1@inf.ed.ac.uk 956691Stjones1@inf.ed.ac.uk Addr 966691Stjones1@inf.ed.ac.uk level2() const 976691Stjones1@inf.ed.ac.uk { 986691Stjones1@inf.ed.ac.uk return PowerISA::PteAddr(addr >> (NPtePageShift + PageShift)); 996691Stjones1@inf.ed.ac.uk } 1006691Stjones1@inf.ed.ac.uk 1016691Stjones1@inf.ed.ac.uk Addr 1026691Stjones1@inf.ed.ac.uk level1() const 1036691Stjones1@inf.ed.ac.uk { 1046691Stjones1@inf.ed.ac.uk return PowerISA::PteAddr(addr >> (2 * NPtePageShift + PageShift)); 1056691Stjones1@inf.ed.ac.uk } 1066691Stjones1@inf.ed.ac.uk}; 1076691Stjones1@inf.ed.ac.uk 1086691Stjones1@inf.ed.ac.uk// ITB/DTB page table entry 1096691Stjones1@inf.ed.ac.ukstruct PTE 1106691Stjones1@inf.ed.ac.uk{ 1116691Stjones1@inf.ed.ac.uk // What parts of the VAddr (from bits 28..11) should be used in 1126691Stjones1@inf.ed.ac.uk // translation (includes Mask and MaskX from PageMask) 1136691Stjones1@inf.ed.ac.uk Addr Mask; 1146691Stjones1@inf.ed.ac.uk 1156691Stjones1@inf.ed.ac.uk // Virtual Page Number (/2) (Includes VPN2 + VPN2X .. bits 31..11 1166691Stjones1@inf.ed.ac.uk // from EntryHi) 1176691Stjones1@inf.ed.ac.uk Addr VPN; 1186691Stjones1@inf.ed.ac.uk 1196691Stjones1@inf.ed.ac.uk // Address Space ID (8 bits) // Lower 8 bits of EntryHi 1206691Stjones1@inf.ed.ac.uk uint8_t asid; 1216691Stjones1@inf.ed.ac.uk 1226691Stjones1@inf.ed.ac.uk // Global Bit - Obtained by an *AND* of EntryLo0 and EntryLo1 G bit 1236691Stjones1@inf.ed.ac.uk bool G; 1246691Stjones1@inf.ed.ac.uk 1256691Stjones1@inf.ed.ac.uk /* Contents of Entry Lo0 */ 1266691Stjones1@inf.ed.ac.uk Addr PFN0; // Physical Frame Number - Even 1276691Stjones1@inf.ed.ac.uk bool D0; // Even entry Dirty Bit 1286691Stjones1@inf.ed.ac.uk bool V0; // Even entry Valid Bit 1296691Stjones1@inf.ed.ac.uk uint8_t C0; // Cache Coherency Bits - Even 1306691Stjones1@inf.ed.ac.uk 1316691Stjones1@inf.ed.ac.uk /* Contents of Entry Lo1 */ 1326691Stjones1@inf.ed.ac.uk Addr PFN1; // Physical Frame Number - Odd 1336691Stjones1@inf.ed.ac.uk bool D1; // Odd entry Dirty Bit 1346691Stjones1@inf.ed.ac.uk bool V1; // Odd entry Valid Bit 1356691Stjones1@inf.ed.ac.uk uint8_t C1; // Cache Coherency Bits (3 bits) 1366691Stjones1@inf.ed.ac.uk 1376691Stjones1@inf.ed.ac.uk // The next few variables are put in as optimizations to reduce TLB 1386691Stjones1@inf.ed.ac.uk // lookup overheads. For a given Mask, what is the address shift amount 1396691Stjones1@inf.ed.ac.uk // and what is the OffsetMask 1406691Stjones1@inf.ed.ac.uk int AddrShiftAmount; 1416691Stjones1@inf.ed.ac.uk int OffsetMask; 1426691Stjones1@inf.ed.ac.uk 1436691Stjones1@inf.ed.ac.uk bool 1446691Stjones1@inf.ed.ac.uk Valid() 1456691Stjones1@inf.ed.ac.uk { 1466691Stjones1@inf.ed.ac.uk return (V0 | V1); 1476691Stjones1@inf.ed.ac.uk }; 1486691Stjones1@inf.ed.ac.uk 14910905Sandreas.sandberg@arm.com void serialize(CheckpointOut &cp) const; 15010905Sandreas.sandberg@arm.com void unserialize(CheckpointIn &cp); 1516691Stjones1@inf.ed.ac.uk}; 1526691Stjones1@inf.ed.ac.uk 1537811Ssteve.reinhardt@amd.com} // namespace PowerISA 1546691Stjones1@inf.ed.ac.uk 1556691Stjones1@inf.ed.ac.uk#endif // __ARCH_POWER_PAGETABLE_H__ 1566691Stjones1@inf.ed.ac.uk 157