fp.isa revision 2135 
1// -*- mode:c++ -*-
2
3////////////////////////////////////////////////////////////////////
4//
5// Floating Point operate instructions
6//
7
8output header {{
9        /**
10         * Base class for FP operations.
11         */
12        class FPOp : public MipsStaticInst
13        {
14                protected:
15
16                /// Constructor
17                FPOp(const char *mnem, MachInst _machInst, OpClass __opClass) : MipsStaticInst(mnem, _machInst, __opClass)
18                {
19                }
20
21                std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
22        };
23}};
24
25output decoder {{
26        std::string FPOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
27        {
28                return "Disassembly of integer instruction\n";
29        }
30}};
31
32def template FloatingPointExecute {{
33        Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const
34        {
35                //These are set to constants when the execute method
36                //is generated
37                bool useCc = ;
38                bool checkPriv = ;
39
40                //Attempt to execute the instruction
41                try
42                {
43                        checkPriv;
44
45                        %(op_decl)s;
46                        %(op_rd)s;
47                        %(code)s;
48                }
49                //If we have an exception for some reason,
50                //deal with it
51                catch(MipsException except)
52                {
53                        //Deal with exception
54                        return No_Fault;
55                }
56
57                //Write the resulting state to the execution context
58                %(op_wb)s;
59                if(useCc)
60                {
61                        xc->regs.miscRegFile.ccrFields.iccFields.n = Rd & (1 << 63);
62                        xc->regs.miscRegFile.ccrFields.iccFields.z = (Rd == 0);
63                        xc->regs.miscRegFile.ccrFields.iccFields.v = ivValue;
64                        xc->regs.miscRegFile.ccrFields.iccFields.c = icValue;
65                        xc->regs.miscRegFile.ccrFields.xccFields.n = Rd & (1 << 31);
66                        xc->regs.miscRegFile.ccrFields.xccFields.z = ((Rd & 0xFFFFFFFF) == 0);
67                        xc->regs.miscRegFile.ccrFields.xccFields.v = xvValue;
68                        xc->regs.miscRegFile.ccrFields.xccFields.c = xcValue;
69                }
70                return No_Fault;
71        }
72}};
73
74// Primary format for integer operate instructions:
75def format FloatOp(code, *flags) {{
76        iop = InstObjParams(name, Name, 'MipsStaticInst', CodeBlock(code), flags)
77        header_output = BasicDeclare.subst(iop)
78        decoder_output = BasicConstructor.subst(iop)
79        decode_block = BasicDecode.subst(iop)
80        exec_output = BasicExecute.subst(iop)
81}};
82
83// Primary format for integer operate instructions:
84def format Float64Op(code, *flags) {{
85        iop = InstObjParams(name, Name, 'MipsStaticInst', CodeBlock(code), flags)
86        header_output = BasicDeclare.subst(iop)
87        decoder_output = BasicConstructor.subst(iop)
88        decode_block = BasicDecode.subst(iop)
89        exec_output = BasicExecute.subst(iop)
90}};
91