dsp.isa revision 4661:44458219add1 
1// -*- mode:c++ -*-
2
3// Copyright (c) 2006 The Regents of The University of Michigan
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright
9// notice, this list of conditions and the following disclaimer;
10// redistributions in binary form must reproduce the above copyright
11// notice, this list of conditions and the following disclaimer in the
12// documentation and/or other materials provided with the distribution;
13// neither the name of the copyright holders nor the names of its
14// contributors may be used to endorse or promote products derived from
15// this software without specific prior written permission.
16//
17// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28//
29// Authors: Korey Sewell
30
31////////////////////////////////////////////////////////////////////
32//
33// DSP integer operate instructions
34//
35output header {{
36#include <iostream>
37    using namespace std;
38    /**
39     * Base class for integer operations.
40     */
41    class DspIntOp : public MipsStaticInst
42    {
43      protected:
44
45        /// Constructor
46        DspIntOp(const char *mnem, MachInst _machInst, OpClass __opClass) :
47            MipsStaticInst(mnem, _machInst, __opClass)
48        {
49        }
50    };
51
52    class DspHiLoOp : public MipsStaticInst
53    {
54      protected:
55
56        /// Constructor
57        DspHiLoOp(const char *mnem, MachInst _machInst, OpClass __opClass) :
58            MipsStaticInst(mnem, _machInst, __opClass)
59        {
60        }
61    };
62}};
63
64// Dsp instruction class execute method template.
65def template DspExecute {{
66        Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const
67        {
68                Fault fault = NoFault;
69
70                %(op_decl)s;
71
72                if (isDspPresent(xc))
73                {
74                    if (isDspEnabled(xc))
75                    {
76                        %(op_rd)s;
77                        %(code)s;
78                    }
79                    else
80                    {
81                        fault = new DspStateDisabledFault();
82                    }
83                }
84                else
85                {
86                    fault = new ReservedInstructionFault();
87                }
88
89                if(fault == NoFault)
90                {
91                    %(op_wb)s;
92                }
93                return fault;
94        }
95}};
96
97// DspHiLo instruction class execute method template.
98def template DspHiLoExecute {{
99        Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const
100        {
101                Fault fault = NoFault;
102
103                %(op_decl)s;
104
105                if (isDspPresent(xc))
106                {
107                    if (isDspEnabled(xc))
108                    {
109                        %(op_rd)s;
110                        %(code)s;
111                    }
112                    else
113                    {
114                        fault = new DspStateDisabledFault();
115                    }
116                }
117                else
118                {
119                    fault = new ReservedInstructionFault();
120                }
121
122                if(fault == NoFault)
123                {
124                    %(op_wb)s;
125                    //If there are 2 Destination Registers then
126                    //concatenate the values for the traceData
127                    if(traceData && _numDestRegs == 2) {
128                        // FIXME - set the trace value correctly here
129                        //uint64_t hilo_final_val = (uint64_t)HI_RD_SEL << 32 | LO_RD_SEL;
130                        //traceData->setData(hilo_final_val);
131                    }
132                }
133                return fault;
134        }
135}};
136
137//Outputs to decoder.cc
138output decoder {{
139}};
140
141output exec {{
142    bool isDspEnabled(%(CPU_exec_context)s *xc)
143    {
144#if FULL_SYSTEM
145        if( bits( xc->readMiscReg(MipsISA::Status), 24, 24 ) == 0 )
146            return false;
147#else
148        //printf("Syscall Emulation Mode: isDspEnabled() check defaults to TRUE\n");
149#endif
150        return true;
151    }
152}};
153
154output exec {{
155    bool isDspPresent(%(CPU_exec_context)s *xc)
156    {
157#if FULL_SYSTEM
158        if( bits( xc->readMiscReg(MipsISA::Config3), 10, 10 ) == 0 )
159            return false;
160#else
161        //printf("Syscall Emulation Mode: isDspPresent() check defaults to TRUE\n");
162#endif
163        return true;
164    }
165}};
166
167// add code to fetch the DSPControl register
168// and write it back after execution, giving
169// the instruction the opportunity to modify
170// it if necessary
171def format DspIntOp(code, *opt_flags) {{
172
173    decl_code = 'uint32_t dspctl;\n'
174    decl_code += 'dspctl = DSPControl;\n'
175
176    write_code = 'DSPControl = dspctl;\n'
177
178    code = decl_code + code + write_code
179
180    iop = InstObjParams(name, Name, 'DspIntOp', code, opt_flags)
181    header_output = BasicDeclare.subst(iop)
182    decoder_output = BasicConstructor.subst(iop)
183    decode_block = BasicDecode.subst(iop)
184    exec_output = DspExecute.subst(iop)
185}};
186
187// add code to fetch the DSPControl register
188// and write it back after execution, giving
189// the instruction the opportunity to modify
190// it if necessary; also, fetch the appropriate
191// HI/LO register pair, based on the AC
192// instruction field.
193
194def format DspHiLoOp(code, *opt_flags) {{
195
196    decl_code = 'int64_t dspac;\n'
197    decl_code += 'uint32_t dspctl;\n'
198
199    fetch_code = 'dspctl = DSPControl;\n'
200    fetch_code += 'dspac = HI_RD_SEL;\n'
201    fetch_code += 'dspac = dspac << 32 | LO_RD_SEL;\n'
202
203    write_code = 'DSPControl = dspctl;\n'
204    write_code += 'HI_RD_SEL = dspac<63:32>;\n'
205    write_code += 'LO_RD_SEL = dspac<31:0>;\n'
206
207    code = decl_code + fetch_code + code + write_code
208
209    iop = InstObjParams(name, Name, 'DspHiLoOp', code, opt_flags)
210    header_output = BasicDeclare.subst(iop)
211    decoder_output = BasicConstructor.subst(iop)
212    decode_block = BasicDecode.subst(iop)
213    exec_output = DspHiLoExecute.subst(iop)
214
215}};
216
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219