faults.cc revision 4661:44458219add1 
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 *          Korey Sewell
30 */
31
32#include "arch/mips/faults.hh"
33#include "cpu/thread_context.hh"
34#include "cpu/base.hh"
35#include "base/trace.hh"
36
37#if !FULL_SYSTEM
38#include "sim/process.hh"
39#include "mem/page_table.hh"
40#endif
41
42namespace MipsISA
43{
44
45FaultName MachineCheckFault::_name = "Machine Check";
46FaultVect MachineCheckFault::_vect = 0x0401;
47FaultStat MachineCheckFault::_count;
48
49FaultName AlignmentFault::_name = "Alignment";
50FaultVect AlignmentFault::_vect = 0x0301;
51FaultStat AlignmentFault::_count;
52
53FaultName ResetFault::_name = "reset";
54FaultVect ResetFault::_vect = 0x0001;
55FaultStat ResetFault::_count;
56
57FaultName CoprocessorUnusableFault::_name = "Coprocessor Unusable";
58FaultVect CoprocessorUnusableFault::_vect = 0xF001;
59FaultStat CoprocessorUnusableFault::_count;
60
61FaultName ReservedInstructionFault::_name = "Reserved Instruction";
62FaultVect ReservedInstructionFault::_vect = 0x0F01;
63FaultStat ReservedInstructionFault::_count;
64
65FaultName ThreadFault::_name = "thread";
66FaultVect ThreadFault::_vect = 0x00F1;
67FaultStat ThreadFault::_count;
68
69
70FaultName ArithmeticFault::_name = "arith";
71FaultVect ArithmeticFault::_vect = 0x0501;
72FaultStat ArithmeticFault::_count;
73
74FaultName UnimplementedOpcodeFault::_name = "opdec";
75FaultVect UnimplementedOpcodeFault::_vect = 0x0481;
76FaultStat UnimplementedOpcodeFault::_count;
77
78#if !FULL_SYSTEM
79//FaultName PageTableFault::_name = "page_table_fault";
80//FaultVect PageTableFault::_vect = 0x0000;
81//FaultStat PageTableFault::_count;
82#endif
83
84FaultName InterruptFault::_name = "interrupt";
85FaultVect InterruptFault::_vect = 0x0101;
86FaultStat InterruptFault::_count;
87
88FaultName NDtbMissFault::_name = "dtb_miss_single";
89FaultVect NDtbMissFault::_vect = 0x0201;
90FaultStat NDtbMissFault::_count;
91
92FaultName PDtbMissFault::_name = "dtb_miss_double";
93FaultVect PDtbMissFault::_vect = 0x0281;
94FaultStat PDtbMissFault::_count;
95
96FaultName DtbPageFault::_name = "dfault";
97FaultVect DtbPageFault::_vect = 0x0381;
98FaultStat DtbPageFault::_count;
99
100FaultName DtbAcvFault::_name = "dfault";
101FaultVect DtbAcvFault::_vect = 0x0381;
102FaultStat DtbAcvFault::_count;
103
104FaultName ItbMissFault::_name = "itbmiss";
105FaultVect ItbMissFault::_vect = 0x0181;
106FaultStat ItbMissFault::_count;
107
108FaultName ItbPageFault::_name = "itbmiss";
109FaultVect ItbPageFault::_vect = 0x0181;
110FaultStat ItbPageFault::_count;
111
112FaultName ItbAcvFault::_name = "iaccvio";
113FaultVect ItbAcvFault::_vect = 0x0081;
114FaultStat ItbAcvFault::_count;
115
116FaultName FloatEnableFault::_name = "fen";
117FaultVect FloatEnableFault::_vect = 0x0581;
118FaultStat FloatEnableFault::_count;
119
120FaultName IntegerOverflowFault::_name = "intover";
121FaultVect IntegerOverflowFault::_vect = 0x0501;
122FaultStat IntegerOverflowFault::_count;
123
124FaultName DspStateDisabledFault::_name = "intover";
125FaultVect DspStateDisabledFault::_vect = 0x001a;
126FaultStat DspStateDisabledFault::_count;
127
128
129/*void PageTableFault::invoke(ThreadContext *tc)
130{
131    Process *p = tc->getProcessPtr();
132
133    Addr page_addr = p->pTable->pageAlign(vaddr);
134
135    warn("%i: [tid:%i]: %s encountered @ addr %x. Allocating new page for address range %x - %x.\n",
136         curTick, tc->getThreadNum(), name(), vaddr, page_addr, page_addr+VMPageSize);
137
138    p->pTable->allocate(page_addr, VMPageSize);
139
140    return;
141}
142*/
143    /* address is higher than the stack region or in the current stack region
144    if (vaddr > p->stack_base || vaddr > p->stack_min)
145        FaultBase::invoke(tc);
146
147    // We've accessed the next page
148    if (vaddr > p->stack_min - PageBytes) {
149        p->stack_min -= PageBytes;
150        if (p->stack_base - p->stack_min > 8*1024*1024) {
151            warn("Already allocated Over max stack size for one thread\n");
152        }
153        warn("%i: Allocating page for range %x - %x",
154             curTick, p->stack_min, p->stack_min-PageBytes);
155
156        p->pTable->allocate(p->stack_min, PageBytes);
157        warn("Increasing stack size by one page.");
158    } else {
159        FaultBase::invoke(tc);
160        }*/
161
162void ResetFault::invoke(ThreadContext *tc)
163{
164    warn("[tid:%i]: %s encountered.\n", tc->getThreadNum(), name());
165    //tc->getCpuPtr()->reset();
166}
167
168void CoprocessorUnusableFault::invoke(ThreadContext *tc)
169{
170    panic("[tid:%i]: %s encountered.\n", tc->getThreadNum(), name());
171}
172
173void ReservedInstructionFault::invoke(ThreadContext *tc)
174{
175    panic("[tid:%i]: %s encountered.\n", tc->getThreadNum(), name());
176}
177
178void ThreadFault::invoke(ThreadContext *tc)
179{
180    panic("[tid:%i]: %s encountered.\n", tc->getThreadNum(), name());
181}
182
183void DspStateDisabledFault::invoke(ThreadContext *tc)
184{
185    panic("[tid:%i]: %s encountered.\n", tc->getThreadNum(), name());
186}
187
188} // namespace MipsISA
189
190