1/*
2 * Copyright (c) 2012-2015 Advanced Micro Devices, Inc.
3 * All rights reserved.
4 *
5 * For use for simulation and test purposes only
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:
9 *
10 * 1. Redistributions of source code must retain the above copyright notice,
11 * this list of conditions and the following disclaimer.
12 *
13 * 2. Redistributions in binary form must reproduce the above copyright notice,
14 * this list of conditions and the following disclaimer in the documentation
15 * and/or other materials provided with the distribution.
16 *
17 * 3. Neither the name of the copyright holder nor the names of its contributors
18 * may be used to endorse or promote products derived from this software
19 * without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
25 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 *
33 * Author: Steve Reinhardt
34 */
35
36#include "arch/hsail/insts/mem.hh"
37
38#include "arch/hsail/Brig.h"
39
40using namespace Brig;
41
42namespace HsailISA
43{
44    const char* atomicOpToString(BrigAtomicOperation brigOp);
45
46    const char*
47    atomicOpToString(BrigAtomicOperation brigOp)
48    {
49        switch (brigOp) {
50          case BRIG_ATOMIC_AND:
51            return "and";
52          case BRIG_ATOMIC_OR:
53            return "or";
54          case BRIG_ATOMIC_XOR:
55            return "xor";
56          case BRIG_ATOMIC_CAS:
57            return "cas";
58          case BRIG_ATOMIC_EXCH:
59            return "exch";
60          case BRIG_ATOMIC_ADD:
61            return "add";
62          case BRIG_ATOMIC_WRAPINC:
63            return "inc";
64          case BRIG_ATOMIC_WRAPDEC:
65            return "dec";
66          case BRIG_ATOMIC_MIN:
67            return "min";
68          case BRIG_ATOMIC_MAX:
69            return "max";
70          case BRIG_ATOMIC_SUB:
71            return "sub";
72          default:
73            return "unknown";
74        }
75    }
76} // namespace HsailISA
77