1/*
2 * Copyright (c) 2016 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Rekai Gonzalez
38 */
39
40/* Auxiliary structs for architecture traits. */
41
42#ifndef __ARCH_COMMON_TRAITS_HH__
43#define __ARCH_COMMON_TRAITS_HH__
44
45#include "arch/types.hh"
46#include "enums/VecRegRenameMode.hh"
47
48/** Helper structure to get the vector register mode for a given ISA.
49 * This way we implement a default 'full' mode, and only those ISA that care
50 * have to actually specialise the template to forward the call to the
51 * appropriate member of the ISA.
52 */
53template <typename ISA>
54struct RenameMode
55{
56    static Enums::VecRegRenameMode init(const ISA*) { return Enums::Full; }
57
58    static Enums::VecRegRenameMode
59    mode(const TheISA::PCState&)
60    { return Enums::Full; }
61
62    /**
63     * Compare the initial rename mode of two instances of the ISA.
64     * Result is true by definition, as the default mode is Full.
65     * */
66    static bool equalsInit(const ISA*, const ISA*) { return true; }
67};
68
69#endif /* __ARCH_COMMON_TRAITS_HH__ */
70