tlb.hh revision 13692:0cb587b75895 
1/*
2 * Copyright (c) 2011 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2006 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Gabe Black
41 */
42
43#ifndef __ARCH_GENERIC_TLB_HH__
44#define __ARCH_GENERIC_TLB_HH__
45
46#include "base/logging.hh"
47#include "mem/mem_object.hh"
48#include "mem/request.hh"
49
50class ThreadContext;
51class BaseMasterPort;
52
53class BaseTLB : public MemObject
54{
55  protected:
56    BaseTLB(const Params *p)
57        : MemObject(p)
58    {}
59
60  public:
61    enum Mode { Read, Write, Execute };
62
63    class Translation
64    {
65      public:
66        virtual ~Translation()
67        {}
68
69        /**
70         * Signal that the translation has been delayed due to a hw page table
71         * walk.
72         */
73        virtual void markDelayed() = 0;
74
75        /*
76         * The memory for this object may be dynamically allocated, and it may
77         * be responsible for cleaning itself up which will happen in this
78         * function. Once it's called, the object is no longer valid.
79         */
80        virtual void finish(const Fault &fault, const RequestPtr &req,
81                            ThreadContext *tc, Mode mode) = 0;
82
83        /** This function is used by the page table walker to determine if it
84         * should translate the a pending request or if the underlying request
85         * has been squashed.
86         * @ return Is the instruction that requested this translation squashed?
87         */
88        virtual bool squashed() const { return false; }
89    };
90
91  public:
92    virtual void demapPage(Addr vaddr, uint64_t asn) = 0;
93
94    virtual Fault translateAtomic(
95            const RequestPtr &req, ThreadContext *tc, Mode mode) = 0;
96    virtual void translateTiming(
97            const RequestPtr &req, ThreadContext *tc,
98            Translation *translation, Mode mode) = 0;
99    virtual Fault
100    translateFunctional(const RequestPtr &req, ThreadContext *tc, Mode mode)
101    {
102        panic("Not implemented.\n");
103    }
104
105    /**
106     * Do post-translation physical address finalization.
107     *
108     * This method is used by some architectures that need
109     * post-translation massaging of physical addresses. For example,
110     * X86 uses this to remap physical addresses in the APIC range to
111     * a range of physical memory not normally available to real x86
112     * implementations.
113     *
114     * @param req Request to updated in-place.
115     * @param tc Thread context that created the request.
116     * @param mode Request type (read/write/execute).
117     * @return A fault on failure, NoFault otherwise.
118     */
119    virtual Fault finalizePhysical(
120            const RequestPtr &req, ThreadContext *tc, Mode mode) const = 0;
121
122    /**
123     * Remove all entries from the TLB
124     */
125    virtual void flushAll() = 0;
126
127    /**
128     * Take over from an old tlb context
129     */
130    virtual void takeOverFrom(BaseTLB *otlb) = 0;
131
132    /**
133     * Get the table walker master port if present. This is used for
134     * migrating port connections during a CPU takeOverFrom()
135     * call. For architectures that do not have a table walker, NULL
136     * is returned, hence the use of a pointer rather than a
137     * reference.
138     *
139     * @return A pointer to the walker master port or NULL if not present
140     */
141    virtual BaseMasterPort* getMasterPort() { return NULL; }
142
143    void memInvalidate() { flushAll(); }
144};
145
146class GenericTLB : public BaseTLB
147{
148  protected:
149    GenericTLB(const Params *p)
150        : BaseTLB(p)
151    {}
152
153  public:
154    void demapPage(Addr vaddr, uint64_t asn) override;
155
156    Fault translateAtomic(
157        const RequestPtr &req, ThreadContext *tc, Mode mode) override;
158    void translateTiming(
159        const RequestPtr &req, ThreadContext *tc,
160        Translation *translation, Mode mode) override;
161
162    Fault finalizePhysical(
163        const RequestPtr &req, ThreadContext *tc, Mode mode) const override;
164};
165
166#endif // __ARCH_GENERIC_TLB_HH__
167