tarmac_tracer.cc revision 13915
112642Sgiacomo.travaglini@arm.com/* 212642Sgiacomo.travaglini@arm.com * Copyright (c) 2017-2018 ARM Limited 312642Sgiacomo.travaglini@arm.com * All rights reserved 412642Sgiacomo.travaglini@arm.com * 512642Sgiacomo.travaglini@arm.com * The license below extends only to copyright in the software and shall 612642Sgiacomo.travaglini@arm.com * not be construed as granting a license to any other intellectual 712642Sgiacomo.travaglini@arm.com * property including but not limited to intellectual property relating 812642Sgiacomo.travaglini@arm.com * to a hardware implementation of the functionality of the software 912642Sgiacomo.travaglini@arm.com * licensed hereunder. You may use the software subject to the license 1012642Sgiacomo.travaglini@arm.com * terms below provided that you ensure that this notice is replicated 1112642Sgiacomo.travaglini@arm.com * unmodified and in its entirety in all distributions of the software, 1212642Sgiacomo.travaglini@arm.com * modified or unmodified, in source code or in binary form. 1312642Sgiacomo.travaglini@arm.com * 1412642Sgiacomo.travaglini@arm.com * Redistribution and use in source and binary forms, with or without 1512642Sgiacomo.travaglini@arm.com * modification, are permitted provided that the following conditions are 1612642Sgiacomo.travaglini@arm.com * met: redistributions of source code must retain the above copyright 1712642Sgiacomo.travaglini@arm.com * notice, this list of conditions and the following disclaimer; 1812642Sgiacomo.travaglini@arm.com * redistributions in binary form must reproduce the above copyright 1912642Sgiacomo.travaglini@arm.com * notice, this list of conditions and the following disclaimer in the 2012642Sgiacomo.travaglini@arm.com * documentation and/or other materials provided with the distribution; 2112642Sgiacomo.travaglini@arm.com * neither the name of the copyright holders nor the names of its 2212642Sgiacomo.travaglini@arm.com * contributors may be used to endorse or promote products derived from 2312642Sgiacomo.travaglini@arm.com * this software without specific prior written permission. 2412642Sgiacomo.travaglini@arm.com * 2512642Sgiacomo.travaglini@arm.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 2612642Sgiacomo.travaglini@arm.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 2712642Sgiacomo.travaglini@arm.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 2812642Sgiacomo.travaglini@arm.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2912642Sgiacomo.travaglini@arm.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 3012642Sgiacomo.travaglini@arm.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 3112642Sgiacomo.travaglini@arm.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 3212642Sgiacomo.travaglini@arm.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 3312642Sgiacomo.travaglini@arm.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 3412642Sgiacomo.travaglini@arm.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 3512642Sgiacomo.travaglini@arm.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 3612642Sgiacomo.travaglini@arm.com * 3712642Sgiacomo.travaglini@arm.com * Authors: Giacomo Travaglini 3812642Sgiacomo.travaglini@arm.com */ 3912642Sgiacomo.travaglini@arm.com 4012642Sgiacomo.travaglini@arm.com#include "tarmac_tracer.hh" 4112642Sgiacomo.travaglini@arm.com 4212642Sgiacomo.travaglini@arm.com#include <string> 4312642Sgiacomo.travaglini@arm.com 4412642Sgiacomo.travaglini@arm.com#include "arch/arm/system.hh" 4512642Sgiacomo.travaglini@arm.com#include "cpu/base.hh" 4612642Sgiacomo.travaglini@arm.com 4712642Sgiacomo.travaglini@arm.comnamespace Trace { 4812642Sgiacomo.travaglini@arm.com 4912642Sgiacomo.travaglini@arm.comstd::string 5012642Sgiacomo.travaglini@arm.comTarmacContext::tarmacCpuName() const 5112642Sgiacomo.travaglini@arm.com{ 5212642Sgiacomo.travaglini@arm.com auto id = thread->getCpuPtr()->cpuId(); 5312642Sgiacomo.travaglini@arm.com return "cpu" + std::to_string(id); 5412642Sgiacomo.travaglini@arm.com} 5512642Sgiacomo.travaglini@arm.com 5612642Sgiacomo.travaglini@arm.comTarmacTracer::TarmacTracer(const Params *p) 5712642Sgiacomo.travaglini@arm.com : InstTracer(p), 5812642Sgiacomo.travaglini@arm.com startTick(p->start_tick), 5912642Sgiacomo.travaglini@arm.com endTick(p->end_tick) 6012642Sgiacomo.travaglini@arm.com{ 6112642Sgiacomo.travaglini@arm.com // Wrong parameter setting: The trace end happens before the 6212642Sgiacomo.travaglini@arm.com // trace start. 6312642Sgiacomo.travaglini@arm.com panic_if(startTick > endTick, 6412642Sgiacomo.travaglini@arm.com "Tarmac start point: %lu is bigger than " 6512642Sgiacomo.travaglini@arm.com "Tarmac end point: %lu\n", startTick, endTick); 6612642Sgiacomo.travaglini@arm.com 6712642Sgiacomo.travaglini@arm.com // By default cpu tracers in gem5 are not tracing faults 6812642Sgiacomo.travaglini@arm.com // (exceptions). 6912642Sgiacomo.travaglini@arm.com // This is not in compliance with the Tarmac specification: 7012642Sgiacomo.travaglini@arm.com // instructions like SVC, SMC, HVC have to be traced. 7112642Sgiacomo.travaglini@arm.com // Tarmac Tracer is then automatically enabling this behaviour. 7212642Sgiacomo.travaglini@arm.com setDebugFlag("ExecFaulting"); 7312642Sgiacomo.travaglini@arm.com} 7412642Sgiacomo.travaglini@arm.com 7512642Sgiacomo.travaglini@arm.comInstRecord * 7612642Sgiacomo.travaglini@arm.comTarmacTracer::getInstRecord(Tick when, ThreadContext *tc, 7712642Sgiacomo.travaglini@arm.com const StaticInstPtr staticInst, 7813915Sgabeblack@google.com ArmISA::PCState pc, 7912642Sgiacomo.travaglini@arm.com const StaticInstPtr macroStaticInst) 8012642Sgiacomo.travaglini@arm.com{ 8112642Sgiacomo.travaglini@arm.com // Check if we need to start tracing since we have passed the 8212642Sgiacomo.travaglini@arm.com // tick start point. 8312642Sgiacomo.travaglini@arm.com if (when < startTick || when > endTick) 8412642Sgiacomo.travaglini@arm.com return nullptr; 8512642Sgiacomo.travaglini@arm.com 8612642Sgiacomo.travaglini@arm.com if (ArmSystem::highestELIs64(tc)) { 8712642Sgiacomo.travaglini@arm.com // TarmacTracerV8 8812642Sgiacomo.travaglini@arm.com return new TarmacTracerRecordV8(when, tc, staticInst, pc, *this, 8912642Sgiacomo.travaglini@arm.com macroStaticInst); 9012642Sgiacomo.travaglini@arm.com } else { 9112642Sgiacomo.travaglini@arm.com // TarmacTracer 9212642Sgiacomo.travaglini@arm.com return new TarmacTracerRecord(when, tc, staticInst, pc, *this, 9312642Sgiacomo.travaglini@arm.com macroStaticInst); 9412642Sgiacomo.travaglini@arm.com } 9512642Sgiacomo.travaglini@arm.com} 9612642Sgiacomo.travaglini@arm.com 9712642Sgiacomo.travaglini@arm.com} // namespace Trace 9812642Sgiacomo.travaglini@arm.com 9912642Sgiacomo.travaglini@arm.comTrace::TarmacTracer * 10012642Sgiacomo.travaglini@arm.comTarmacTracerParams::create() 10112642Sgiacomo.travaglini@arm.com{ 10212642Sgiacomo.travaglini@arm.com return new Trace::TarmacTracer(this); 10312642Sgiacomo.travaglini@arm.com} 104