process.cc revision 8601:af28085882dc
1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Copyright (c) 2007-2008 The Florida State University 15 * All rights reserved. 16 * 17 * Redistribution and use in source and binary forms, with or without 18 * modification, are permitted provided that the following conditions are 19 * met: redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer; 21 * redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution; 24 * neither the name of the copyright holders nor the names of its 25 * contributors may be used to endorse or promote products derived from 26 * this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 39 * 40 * Authors: Stephen Hines 41 * Ali Saidi 42 */ 43 44#include "arch/arm/isa_traits.hh" 45#include "arch/arm/process.hh" 46#include "arch/arm/types.hh" 47#include "base/loader/elf_object.hh" 48#include "base/loader/object_file.hh" 49#include "base/misc.hh" 50#include "cpu/thread_context.hh" 51#include "debug/Stack.hh" 52#include "mem/page_table.hh" 53#include "mem/translating_port.hh" 54#include "sim/byteswap.hh" 55#include "sim/process_impl.hh" 56#include "sim/system.hh" 57 58using namespace std; 59using namespace ArmISA; 60 61ArmLiveProcess::ArmLiveProcess(LiveProcessParams *params, ObjectFile *objFile, 62 ObjectFile::Arch _arch) 63 : LiveProcess(params, objFile), arch(_arch) 64{ 65 stack_base = 0xbf000000L; 66 67 // Set pointer for next thread stack. Reserve 8M for main stack. 68 next_thread_stack_base = stack_base - (8 * 1024 * 1024); 69 70 // Set up break point (Top of Heap) 71 brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize(); 72 brk_point = roundUp(brk_point, VMPageSize); 73 74 // Set up region for mmaps. For now, start at bottom of kuseg space. 75 mmap_start = mmap_end = 0x40000000L; 76} 77 78void 79ArmLiveProcess::initState() 80{ 81 LiveProcess::initState(); 82 argsInit(MachineBytes, VMPageSize); 83 for (int i = 0; i < contextIds.size(); i++) { 84 ThreadContext * tc = system->getThreadContext(contextIds[i]); 85 CPACR cpacr = tc->readMiscReg(MISCREG_CPACR); 86 // Enable the floating point coprocessors. 87 cpacr.cp10 = 0x3; 88 cpacr.cp11 = 0x3; 89 tc->setMiscReg(MISCREG_CPACR, cpacr); 90 // Generically enable floating point support. 91 FPEXC fpexc = tc->readMiscReg(MISCREG_FPEXC); 92 fpexc.en = 1; 93 tc->setMiscReg(MISCREG_FPEXC, fpexc); 94 } 95} 96 97void 98ArmLiveProcess::argsInit(int intSize, int pageSize) 99{ 100 typedef AuxVector<uint32_t> auxv_t; 101 std::vector<auxv_t> auxv; 102 103 string filename; 104 if (argv.size() < 1) 105 filename = ""; 106 else 107 filename = argv[0]; 108 109 //We want 16 byte alignment 110 uint64_t align = 16; 111 112 // load object file into target memory 113 objFile->loadSections(initVirtMem); 114 115 enum ArmCpuFeature { 116 Arm_Swp = 1 << 0, 117 Arm_Half = 1 << 1, 118 Arm_Thumb = 1 << 2, 119 Arm_26Bit = 1 << 3, 120 Arm_FastMult = 1 << 4, 121 Arm_Fpa = 1 << 5, 122 Arm_Vfp = 1 << 6, 123 Arm_Edsp = 1 << 7, 124 Arm_Java = 1 << 8, 125 Arm_Iwmmxt = 1 << 9, 126 Arm_Crunch = 1 << 10, 127 Arm_ThumbEE = 1 << 11, 128 Arm_Neon = 1 << 12, 129 Arm_Vfpv3 = 1 << 13, 130 Arm_Vfpv3d16 = 1 << 14 131 }; 132 133 //Setup the auxilliary vectors. These will already have endian conversion. 134 //Auxilliary vectors are loaded only for elf formatted executables. 135 ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile); 136 if (elfObject) { 137 uint32_t features = 138 Arm_Swp | 139 Arm_Half | 140 Arm_Thumb | 141// Arm_26Bit | 142 Arm_FastMult | 143// Arm_Fpa | 144 Arm_Vfp | 145 Arm_Edsp | 146// Arm_Java | 147// Arm_Iwmmxt | 148// Arm_Crunch | 149 Arm_ThumbEE | 150 Arm_Neon | 151 Arm_Vfpv3 | 152 Arm_Vfpv3d16 | 153 0; 154 155 //Bits which describe the system hardware capabilities 156 //XXX Figure out what these should be 157 auxv.push_back(auxv_t(M5_AT_HWCAP, features)); 158 //The system page size 159 auxv.push_back(auxv_t(M5_AT_PAGESZ, ArmISA::VMPageSize)); 160 //Frequency at which times() increments 161 auxv.push_back(auxv_t(M5_AT_CLKTCK, 0x64)); 162 // For statically linked executables, this is the virtual address of the 163 // program header tables if they appear in the executable image 164 auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable())); 165 // This is the size of a program header entry from the elf file. 166 auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize())); 167 // This is the number of program headers from the original elf file. 168 auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount())); 169 //This is the address of the elf "interpreter", It should be set 170 //to 0 for regular executables. It should be something else 171 //(not sure what) for dynamic libraries. 172 auxv.push_back(auxv_t(M5_AT_BASE, 0)); 173 174 //XXX Figure out what this should be. 175 auxv.push_back(auxv_t(M5_AT_FLAGS, 0)); 176 //The entry point to the program 177 auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint())); 178 //Different user and group IDs 179 auxv.push_back(auxv_t(M5_AT_UID, uid())); 180 auxv.push_back(auxv_t(M5_AT_EUID, euid())); 181 auxv.push_back(auxv_t(M5_AT_GID, gid())); 182 auxv.push_back(auxv_t(M5_AT_EGID, egid())); 183 //Whether to enable "secure mode" in the executable 184 auxv.push_back(auxv_t(M5_AT_SECURE, 0)); 185 186 // Pointer to 16 bytes of random data 187 auxv.push_back(auxv_t(M5_AT_RANDOM, 0)); 188 189 //The filename of the program 190 auxv.push_back(auxv_t(M5_AT_EXECFN, 0)); 191 //The string "v71" -- ARM v7 architecture 192 auxv.push_back(auxv_t(M5_AT_PLATFORM, 0)); 193 } 194 195 //Figure out how big the initial stack nedes to be 196 197 // A sentry NULL void pointer at the top of the stack. 198 int sentry_size = intSize; 199 200 string platform = "v71"; 201 int platform_size = platform.size() + 1; 202 203 // Bytes for AT_RANDOM above, we'll just keep them 0 204 int aux_random_size = 16; // as per the specification 205 206 // The aux vectors are put on the stack in two groups. The first group are 207 // the vectors that are generated as the elf is loaded. The second group 208 // are the ones that were computed ahead of time and include the platform 209 // string. 210 int aux_data_size = filename.size() + 1; 211 212 int env_data_size = 0; 213 for (int i = 0; i < envp.size(); ++i) { 214 env_data_size += envp[i].size() + 1; 215 } 216 int arg_data_size = 0; 217 for (int i = 0; i < argv.size(); ++i) { 218 arg_data_size += argv[i].size() + 1; 219 } 220 221 int info_block_size = 222 sentry_size + env_data_size + arg_data_size + 223 aux_data_size + platform_size + aux_random_size; 224 225 //Each auxilliary vector is two 4 byte words 226 int aux_array_size = intSize * 2 * (auxv.size() + 1); 227 228 int envp_array_size = intSize * (envp.size() + 1); 229 int argv_array_size = intSize * (argv.size() + 1); 230 231 int argc_size = intSize; 232 233 //Figure out the size of the contents of the actual initial frame 234 int frame_size = 235 info_block_size + 236 aux_array_size + 237 envp_array_size + 238 argv_array_size + 239 argc_size; 240 241 //There needs to be padding after the auxiliary vector data so that the 242 //very bottom of the stack is aligned properly. 243 int partial_size = frame_size; 244 int aligned_partial_size = roundUp(partial_size, align); 245 int aux_padding = aligned_partial_size - partial_size; 246 247 int space_needed = frame_size + aux_padding; 248 249 stack_min = stack_base - space_needed; 250 stack_min = roundDown(stack_min, align); 251 stack_size = stack_base - stack_min; 252 253 // map memory 254 allocateMem(roundDown(stack_min, pageSize), roundUp(stack_size, pageSize)); 255 256 // map out initial stack contents 257 uint32_t sentry_base = stack_base - sentry_size; 258 uint32_t aux_data_base = sentry_base - aux_data_size; 259 uint32_t env_data_base = aux_data_base - env_data_size; 260 uint32_t arg_data_base = env_data_base - arg_data_size; 261 uint32_t platform_base = arg_data_base - platform_size; 262 uint32_t aux_random_base = platform_base - aux_random_size; 263 uint32_t auxv_array_base = aux_random_base - aux_array_size - aux_padding; 264 uint32_t envp_array_base = auxv_array_base - envp_array_size; 265 uint32_t argv_array_base = envp_array_base - argv_array_size; 266 uint32_t argc_base = argv_array_base - argc_size; 267 268 DPRINTF(Stack, "The addresses of items on the initial stack:\n"); 269 DPRINTF(Stack, "0x%x - aux data\n", aux_data_base); 270 DPRINTF(Stack, "0x%x - env data\n", env_data_base); 271 DPRINTF(Stack, "0x%x - arg data\n", arg_data_base); 272 DPRINTF(Stack, "0x%x - random data\n", aux_random_base); 273 DPRINTF(Stack, "0x%x - platform base\n", platform_base); 274 DPRINTF(Stack, "0x%x - auxv array\n", auxv_array_base); 275 DPRINTF(Stack, "0x%x - envp array\n", envp_array_base); 276 DPRINTF(Stack, "0x%x - argv array\n", argv_array_base); 277 DPRINTF(Stack, "0x%x - argc \n", argc_base); 278 DPRINTF(Stack, "0x%x - stack min\n", stack_min); 279 280 // write contents to stack 281 282 // figure out argc 283 uint32_t argc = argv.size(); 284 uint32_t guestArgc = ArmISA::htog(argc); 285 286 //Write out the sentry void * 287 uint32_t sentry_NULL = 0; 288 initVirtMem->writeBlob(sentry_base, 289 (uint8_t*)&sentry_NULL, sentry_size); 290 291 //Fix up the aux vectors which point to other data 292 for (int i = auxv.size() - 1; i >= 0; i--) { 293 if (auxv[i].a_type == M5_AT_PLATFORM) { 294 auxv[i].a_val = platform_base; 295 initVirtMem->writeString(platform_base, platform.c_str()); 296 } else if (auxv[i].a_type == M5_AT_EXECFN) { 297 auxv[i].a_val = aux_data_base; 298 initVirtMem->writeString(aux_data_base, filename.c_str()); 299 } else if (auxv[i].a_type == M5_AT_RANDOM) { 300 auxv[i].a_val = aux_random_base; 301 // Just leave the value 0, we don't want randomness 302 } 303 } 304 305 //Copy the aux stuff 306 for(int x = 0; x < auxv.size(); x++) 307 { 308 initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize, 309 (uint8_t*)&(auxv[x].a_type), intSize); 310 initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize, 311 (uint8_t*)&(auxv[x].a_val), intSize); 312 } 313 //Write out the terminating zeroed auxilliary vector 314 const uint64_t zero = 0; 315 initVirtMem->writeBlob(auxv_array_base + 2 * intSize * auxv.size(), 316 (uint8_t*)&zero, 2 * intSize); 317 318 copyStringArray(envp, envp_array_base, env_data_base, initVirtMem); 319 copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem); 320 321 initVirtMem->writeBlob(argc_base, (uint8_t*)&guestArgc, intSize); 322 323 ThreadContext *tc = system->getThreadContext(contextIds[0]); 324 //Set the stack pointer register 325 tc->setIntReg(StackPointerReg, stack_min); 326 //A pointer to a function to run when the program exits. We'll set this 327 //to zero explicitly to make sure this isn't used. 328 tc->setIntReg(ArgumentReg0, 0); 329 //Set argument regs 1 and 2 to argv[0] and envp[0] respectively 330 if (argv.size() > 0) { 331 tc->setIntReg(ArgumentReg1, arg_data_base + arg_data_size - 332 argv[argv.size() - 1].size() - 1); 333 } else { 334 tc->setIntReg(ArgumentReg1, 0); 335 } 336 if (envp.size() > 0) { 337 tc->setIntReg(ArgumentReg2, env_data_base + env_data_size - 338 envp[envp.size() - 1].size() - 1); 339 } else { 340 tc->setIntReg(ArgumentReg2, 0); 341 } 342 343 PCState pc; 344 pc.thumb(arch == ObjectFile::Thumb); 345 pc.nextThumb(pc.thumb()); 346 pc.set(objFile->entryPoint() & ~mask(1)); 347 tc->pcState(pc); 348 349 //Align the "stack_min" to a page boundary. 350 stack_min = roundDown(stack_min, pageSize); 351} 352 353ArmISA::IntReg 354ArmLiveProcess::getSyscallArg(ThreadContext *tc, int &i) 355{ 356 assert(i < 6); 357 return tc->readIntReg(ArgumentReg0 + i++); 358} 359 360uint64_t 361ArmLiveProcess::getSyscallArg(ThreadContext *tc, int &i, int width) 362{ 363 assert(width == 32 || width == 64); 364 if (width == 32) 365 return getSyscallArg(tc, i); 366 367 // 64 bit arguments are passed starting in an even register 368 if (i % 2 != 0) 369 i++; 370 371 // Registers r0-r6 can be used 372 assert(i < 5); 373 uint64_t val; 374 val = tc->readIntReg(ArgumentReg0 + i++); 375 val |= ((uint64_t)tc->readIntReg(ArgumentReg0 + i++) << 32); 376 return val; 377} 378 379 380void 381ArmLiveProcess::setSyscallArg(ThreadContext *tc, 382 int i, ArmISA::IntReg val) 383{ 384 assert(i < 4); 385 tc->setIntReg(ArgumentReg0 + i, val); 386} 387 388void 389ArmLiveProcess::setSyscallReturn(ThreadContext *tc, 390 SyscallReturn return_value) 391{ 392 tc->setIntReg(ReturnValueReg, return_value.value()); 393} 394