process.cc revision 8216:70e61aa65759 
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2007-2008 The Florida State University
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Stephen Hines
41 *          Ali Saidi
42 */
43
44#include "arch/arm/isa_traits.hh"
45#include "arch/arm/process.hh"
46#include "arch/arm/types.hh"
47#include "base/loader/elf_object.hh"
48#include "base/loader/object_file.hh"
49#include "base/misc.hh"
50#include "cpu/thread_context.hh"
51#include "mem/page_table.hh"
52#include "mem/translating_port.hh"
53#include "sim/byteswap.hh"
54#include "sim/process_impl.hh"
55#include "sim/system.hh"
56
57using namespace std;
58using namespace ArmISA;
59
60ArmLiveProcess::ArmLiveProcess(LiveProcessParams *params, ObjectFile *objFile,
61                               ObjectFile::Arch _arch)
62    : LiveProcess(params, objFile), arch(_arch)
63{
64    stack_base = 0xbf000000L;
65
66    // Set pointer for next thread stack.  Reserve 8M for main stack.
67    next_thread_stack_base = stack_base - (8 * 1024 * 1024);
68
69    // Set up break point (Top of Heap)
70    brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize();
71    brk_point = roundUp(brk_point, VMPageSize);
72
73    // Set up region for mmaps. For now, start at bottom of kuseg space.
74    mmap_start = mmap_end = 0x40000000L;
75}
76
77void
78ArmLiveProcess::initState()
79{
80    LiveProcess::initState();
81    argsInit(MachineBytes, VMPageSize);
82    for (int i = 0; i < contextIds.size(); i++) {
83        ThreadContext * tc = system->getThreadContext(contextIds[i]);
84        CPACR cpacr = tc->readMiscReg(MISCREG_CPACR);
85        // Enable the floating point coprocessors.
86        cpacr.cp10 = 0x3;
87        cpacr.cp11 = 0x3;
88        tc->setMiscReg(MISCREG_CPACR, cpacr);
89        // Generically enable floating point support.
90        FPEXC fpexc = tc->readMiscReg(MISCREG_FPEXC);
91        fpexc.en = 1;
92        tc->setMiscReg(MISCREG_FPEXC, fpexc);
93    }
94}
95
96void
97ArmLiveProcess::argsInit(int intSize, int pageSize)
98{
99    typedef AuxVector<uint32_t> auxv_t;
100    std::vector<auxv_t> auxv;
101
102    string filename;
103    if (argv.size() < 1)
104        filename = "";
105    else
106        filename = argv[0];
107
108    //We want 16 byte alignment
109    uint64_t align = 16;
110
111    // load object file into target memory
112    objFile->loadSections(initVirtMem);
113
114    enum ArmCpuFeature {
115        Arm_Swp = 1 << 0,
116        Arm_Half = 1 << 1,
117        Arm_Thumb = 1 << 2,
118        Arm_26Bit = 1 << 3,
119        Arm_FastMult = 1 << 4,
120        Arm_Fpa = 1 << 5,
121        Arm_Vfp = 1 << 6,
122        Arm_Edsp = 1 << 7,
123        Arm_Java = 1 << 8,
124        Arm_Iwmmxt = 1 << 9,
125        Arm_Crunch = 1 << 10,
126        Arm_ThumbEE = 1 << 11,
127        Arm_Neon = 1 << 12,
128        Arm_Vfpv3 = 1 << 13,
129        Arm_Vfpv3d16 = 1 << 14
130    };
131
132    //Setup the auxilliary vectors. These will already have endian conversion.
133    //Auxilliary vectors are loaded only for elf formatted executables.
134    ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile);
135    if (elfObject) {
136        uint32_t features =
137            Arm_Swp |
138            Arm_Half |
139            Arm_Thumb |
140//            Arm_26Bit |
141            Arm_FastMult |
142//            Arm_Fpa |
143            Arm_Vfp |
144            Arm_Edsp |
145//            Arm_Java |
146//            Arm_Iwmmxt |
147//            Arm_Crunch |
148            Arm_ThumbEE |
149            Arm_Neon |
150            Arm_Vfpv3 |
151            Arm_Vfpv3d16 |
152            0;
153
154        //Bits which describe the system hardware capabilities
155        //XXX Figure out what these should be
156        auxv.push_back(auxv_t(M5_AT_HWCAP, features));
157        //The system page size
158        auxv.push_back(auxv_t(M5_AT_PAGESZ, ArmISA::VMPageSize));
159        //Frequency at which times() increments
160        auxv.push_back(auxv_t(M5_AT_CLKTCK, 0x64));
161        // For statically linked executables, this is the virtual address of the
162        // program header tables if they appear in the executable image
163        auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable()));
164        // This is the size of a program header entry from the elf file.
165        auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize()));
166        // This is the number of program headers from the original elf file.
167        auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount()));
168        //This is the address of the elf "interpreter", It should be set
169        //to 0 for regular executables. It should be something else
170        //(not sure what) for dynamic libraries.
171        auxv.push_back(auxv_t(M5_AT_BASE, 0));
172
173        //XXX Figure out what this should be.
174        auxv.push_back(auxv_t(M5_AT_FLAGS, 0));
175        //The entry point to the program
176        auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint()));
177        //Different user and group IDs
178        auxv.push_back(auxv_t(M5_AT_UID, uid()));
179        auxv.push_back(auxv_t(M5_AT_EUID, euid()));
180        auxv.push_back(auxv_t(M5_AT_GID, gid()));
181        auxv.push_back(auxv_t(M5_AT_EGID, egid()));
182        //Whether to enable "secure mode" in the executable
183        auxv.push_back(auxv_t(M5_AT_SECURE, 0));
184
185        // Pointer to 16 bytes of random data
186        auxv.push_back(auxv_t(M5_AT_RANDOM, 0));
187
188        //The filename of the program
189        auxv.push_back(auxv_t(M5_AT_EXECFN, 0));
190        //The string "v71" -- ARM v7 architecture
191        auxv.push_back(auxv_t(M5_AT_PLATFORM, 0));
192    }
193
194    //Figure out how big the initial stack nedes to be
195
196    // A sentry NULL void pointer at the top of the stack.
197    int sentry_size = intSize;
198
199    string platform = "v71";
200    int platform_size = platform.size() + 1;
201
202    // Bytes for AT_RANDOM above, we'll just keep them 0
203    int aux_random_size = 16; // as per the specification
204
205    // The aux vectors are put on the stack in two groups. The first group are
206    // the vectors that are generated as the elf is loaded. The second group
207    // are the ones that were computed ahead of time and include the platform
208    // string.
209    int aux_data_size = filename.size() + 1;
210
211    int env_data_size = 0;
212    for (int i = 0; i < envp.size(); ++i) {
213        env_data_size += envp[i].size() + 1;
214    }
215    int arg_data_size = 0;
216    for (int i = 0; i < argv.size(); ++i) {
217        arg_data_size += argv[i].size() + 1;
218    }
219
220    int info_block_size =
221        sentry_size + env_data_size + arg_data_size +
222        aux_data_size + platform_size + aux_random_size;
223
224    //Each auxilliary vector is two 4 byte words
225    int aux_array_size = intSize * 2 * (auxv.size() + 1);
226
227    int envp_array_size = intSize * (envp.size() + 1);
228    int argv_array_size = intSize * (argv.size() + 1);
229
230    int argc_size = intSize;
231
232    //Figure out the size of the contents of the actual initial frame
233    int frame_size =
234        info_block_size +
235        aux_array_size +
236        envp_array_size +
237        argv_array_size +
238        argc_size;
239
240    //There needs to be padding after the auxiliary vector data so that the
241    //very bottom of the stack is aligned properly.
242    int partial_size = frame_size;
243    int aligned_partial_size = roundUp(partial_size, align);
244    int aux_padding = aligned_partial_size - partial_size;
245
246    int space_needed = frame_size + aux_padding;
247
248    stack_min = stack_base - space_needed;
249    stack_min = roundDown(stack_min, align);
250    stack_size = stack_base - stack_min;
251
252    // map memory
253    pTable->allocate(roundDown(stack_min, pageSize),
254                     roundUp(stack_size, pageSize));
255
256    // map out initial stack contents
257    uint32_t sentry_base = stack_base - sentry_size;
258    uint32_t aux_data_base = sentry_base - aux_data_size;
259    uint32_t env_data_base = aux_data_base - env_data_size;
260    uint32_t arg_data_base = env_data_base - arg_data_size;
261    uint32_t platform_base = arg_data_base - platform_size;
262    uint32_t aux_random_base = platform_base - aux_random_size;
263    uint32_t auxv_array_base = aux_random_base - aux_array_size - aux_padding;
264    uint32_t envp_array_base = auxv_array_base - envp_array_size;
265    uint32_t argv_array_base = envp_array_base - argv_array_size;
266    uint32_t argc_base = argv_array_base - argc_size;
267
268    DPRINTF(Stack, "The addresses of items on the initial stack:\n");
269    DPRINTF(Stack, "0x%x - aux data\n", aux_data_base);
270    DPRINTF(Stack, "0x%x - env data\n", env_data_base);
271    DPRINTF(Stack, "0x%x - arg data\n", arg_data_base);
272    DPRINTF(Stack, "0x%x - random data\n", aux_random_base);
273    DPRINTF(Stack, "0x%x - platform base\n", platform_base);
274    DPRINTF(Stack, "0x%x - auxv array\n", auxv_array_base);
275    DPRINTF(Stack, "0x%x - envp array\n", envp_array_base);
276    DPRINTF(Stack, "0x%x - argv array\n", argv_array_base);
277    DPRINTF(Stack, "0x%x - argc \n", argc_base);
278    DPRINTF(Stack, "0x%x - stack min\n", stack_min);
279
280    // write contents to stack
281
282    // figure out argc
283    uint32_t argc = argv.size();
284    uint32_t guestArgc = ArmISA::htog(argc);
285
286    //Write out the sentry void *
287    uint32_t sentry_NULL = 0;
288    initVirtMem->writeBlob(sentry_base,
289            (uint8_t*)&sentry_NULL, sentry_size);
290
291    //Fix up the aux vectors which point to other data
292    for (int i = auxv.size() - 1; i >= 0; i--) {
293        if (auxv[i].a_type == M5_AT_PLATFORM) {
294            auxv[i].a_val = platform_base;
295            initVirtMem->writeString(platform_base, platform.c_str());
296        } else if (auxv[i].a_type == M5_AT_EXECFN) {
297            auxv[i].a_val = aux_data_base;
298            initVirtMem->writeString(aux_data_base, filename.c_str());
299        } else if (auxv[i].a_type == M5_AT_RANDOM) {
300            auxv[i].a_val = aux_random_base;
301            // Just leave the value 0, we don't want randomness
302        }
303    }
304
305    //Copy the aux stuff
306    for(int x = 0; x < auxv.size(); x++)
307    {
308        initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize,
309                (uint8_t*)&(auxv[x].a_type), intSize);
310        initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
311                (uint8_t*)&(auxv[x].a_val), intSize);
312    }
313    //Write out the terminating zeroed auxilliary vector
314    const uint64_t zero = 0;
315    initVirtMem->writeBlob(auxv_array_base + 2 * intSize * auxv.size(),
316            (uint8_t*)&zero, 2 * intSize);
317
318    copyStringArray(envp, envp_array_base, env_data_base, initVirtMem);
319    copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem);
320
321    initVirtMem->writeBlob(argc_base, (uint8_t*)&guestArgc, intSize);
322
323    ThreadContext *tc = system->getThreadContext(contextIds[0]);
324    //Set the stack pointer register
325    tc->setIntReg(StackPointerReg, stack_min);
326    //A pointer to a function to run when the program exits. We'll set this
327    //to zero explicitly to make sure this isn't used.
328    tc->setIntReg(ArgumentReg0, 0);
329    //Set argument regs 1 and 2 to argv[0] and envp[0] respectively
330    if (argv.size() > 0) {
331        tc->setIntReg(ArgumentReg1, arg_data_base + arg_data_size -
332                                    argv[argv.size() - 1].size() - 1);
333    } else {
334        tc->setIntReg(ArgumentReg1, 0);
335    }
336    if (envp.size() > 0) {
337        tc->setIntReg(ArgumentReg2, env_data_base + env_data_size -
338                                    envp[envp.size() - 1].size() - 1);
339    } else {
340        tc->setIntReg(ArgumentReg2, 0);
341    }
342
343    PCState pc;
344    pc.thumb(arch == ObjectFile::Thumb);
345    pc.nextThumb(pc.thumb());
346    pc.set(objFile->entryPoint() & ~mask(1));
347    tc->pcState(pc);
348
349    //Align the "stack_min" to a page boundary.
350    stack_min = roundDown(stack_min, pageSize);
351}
352
353ArmISA::IntReg
354ArmLiveProcess::getSyscallArg(ThreadContext *tc, int &i)
355{
356    assert(i < 6);
357    return tc->readIntReg(ArgumentReg0 + i++);
358}
359
360uint64_t
361ArmLiveProcess::getSyscallArg(ThreadContext *tc, int &i, int width)
362{
363    assert(width == 32 || width == 64);
364    if (width == 32)
365        return getSyscallArg(tc, i);
366
367    // 64 bit arguments are passed starting in an even register
368    if (i % 2 != 0)
369       i++;
370
371    // Registers r0-r6 can be used
372    assert(i < 5);
373    uint64_t val;
374    val = tc->readIntReg(ArgumentReg0 + i++);
375    val |= ((uint64_t)tc->readIntReg(ArgumentReg0 + i++) << 32);
376    return val;
377}
378
379
380void
381ArmLiveProcess::setSyscallArg(ThreadContext *tc,
382        int i, ArmISA::IntReg val)
383{
384    assert(i < 4);
385    tc->setIntReg(ArgumentReg0 + i, val);
386}
387
388void
389ArmLiveProcess::setSyscallReturn(ThreadContext *tc,
390        SyscallReturn return_value)
391{
392    tc->setIntReg(ReturnValueReg, return_value.value());
393}
394