process.cc revision 7640:5286a8a469c5
1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Copyright (c) 2007-2008 The Florida State University 15 * All rights reserved. 16 * 17 * Redistribution and use in source and binary forms, with or without 18 * modification, are permitted provided that the following conditions are 19 * met: redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer; 21 * redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution; 24 * neither the name of the copyright holders nor the names of its 25 * contributors may be used to endorse or promote products derived from 26 * this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 39 * 40 * Authors: Stephen Hines 41 * Ali Saidi 42 */ 43 44#include "arch/arm/isa_traits.hh" 45#include "arch/arm/process.hh" 46#include "arch/arm/types.hh" 47#include "base/loader/elf_object.hh" 48#include "base/loader/object_file.hh" 49#include "base/misc.hh" 50#include "cpu/thread_context.hh" 51#include "mem/page_table.hh" 52#include "mem/translating_port.hh" 53#include "sim/process_impl.hh" 54#include "sim/system.hh" 55 56using namespace std; 57using namespace ArmISA; 58 59ArmLiveProcess::ArmLiveProcess(LiveProcessParams *params, ObjectFile *objFile, 60 ObjectFile::Arch _arch) 61 : LiveProcess(params, objFile), arch(_arch) 62{ 63 stack_base = 0xbf000000L; 64 65 // Set pointer for next thread stack. Reserve 8M for main stack. 66 next_thread_stack_base = stack_base - (8 * 1024 * 1024); 67 68 // Set up break point (Top of Heap) 69 brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize(); 70 brk_point = roundUp(brk_point, VMPageSize); 71 72 // Set up region for mmaps. For now, start at bottom of kuseg space. 73 mmap_start = mmap_end = 0x40000000L; 74} 75 76void 77ArmLiveProcess::startup() 78{ 79 LiveProcess::startup(); 80 argsInit(MachineBytes, VMPageSize); 81 for (int i = 0; i < contextIds.size(); i++) { 82 ThreadContext * tc = system->getThreadContext(contextIds[i]); 83 CPACR cpacr = tc->readMiscReg(MISCREG_CPACR); 84 // Enable the floating point coprocessors. 85 cpacr.cp10 = 0x3; 86 cpacr.cp11 = 0x3; 87 tc->setMiscReg(MISCREG_CPACR, cpacr); 88 // Generically enable floating point support. 89 FPEXC fpexc = tc->readMiscReg(MISCREG_FPEXC); 90 fpexc.en = 1; 91 tc->setMiscReg(MISCREG_FPEXC, fpexc); 92 } 93} 94 95void 96ArmLiveProcess::copyStringArray32(std::vector<std::string> &strings, 97 Addr array_ptr, Addr data_ptr, 98 TranslatingPort* memPort) 99{ 100 Addr data_ptr_swap; 101 for (int i = 0; i < strings.size(); ++i) { 102 data_ptr_swap = htog(data_ptr); 103 memPort->writeBlob(array_ptr, (uint8_t*)&data_ptr_swap, 104 sizeof(uint32_t)); 105 memPort->writeString(data_ptr, strings[i].c_str()); 106 array_ptr += sizeof(uint32_t); 107 data_ptr += strings[i].size() + 1; 108 } 109 // add NULL terminator 110 data_ptr = 0; 111 112 memPort->writeBlob(array_ptr, (uint8_t*)&data_ptr, sizeof(uint32_t)); 113} 114 115void 116ArmLiveProcess::argsInit(int intSize, int pageSize) 117{ 118 typedef AuxVector<uint32_t> auxv_t; 119 std::vector<auxv_t> auxv; 120 121 string filename; 122 if (argv.size() < 1) 123 filename = ""; 124 else 125 filename = argv[0]; 126 127 //We want 16 byte alignment 128 uint64_t align = 16; 129 130 // load object file into target memory 131 objFile->loadSections(initVirtMem); 132 133 enum ArmCpuFeature { 134 Arm_Swp = 1 << 0, 135 Arm_Half = 1 << 1, 136 Arm_Thumb = 1 << 2, 137 Arm_26Bit = 1 << 3, 138 Arm_FastMult = 1 << 4, 139 Arm_Fpa = 1 << 5, 140 Arm_Vfp = 1 << 6, 141 Arm_Edsp = 1 << 7, 142 Arm_Java = 1 << 8, 143 Arm_Iwmmxt = 1 << 9, 144 Arm_Crunch = 1 << 10, 145 Arm_ThumbEE = 1 << 11, 146 Arm_Neon = 1 << 12, 147 Arm_Vfpv3 = 1 << 13, 148 Arm_Vfpv3d16 = 1 << 14 149 }; 150 151 //Setup the auxilliary vectors. These will already have endian conversion. 152 //Auxilliary vectors are loaded only for elf formatted executables. 153 ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile); 154 if (elfObject) { 155 uint32_t features = 156 Arm_Swp | 157 Arm_Half | 158 Arm_Thumb | 159// Arm_26Bit | 160 Arm_FastMult | 161// Arm_Fpa | 162 Arm_Vfp | 163 Arm_Edsp | 164// Arm_Java | 165// Arm_Iwmmxt | 166// Arm_Crunch | 167 Arm_ThumbEE | 168 Arm_Neon | 169 Arm_Vfpv3 | 170 Arm_Vfpv3d16 | 171 0; 172 173 //Bits which describe the system hardware capabilities 174 //XXX Figure out what these should be 175 auxv.push_back(auxv_t(M5_AT_HWCAP, features)); 176 //The system page size 177 auxv.push_back(auxv_t(M5_AT_PAGESZ, ArmISA::VMPageSize)); 178 //Frequency at which times() increments 179 auxv.push_back(auxv_t(M5_AT_CLKTCK, 0x64)); 180 // For statically linked executables, this is the virtual address of the 181 // program header tables if they appear in the executable image 182 auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable())); 183 // This is the size of a program header entry from the elf file. 184 auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize())); 185 // This is the number of program headers from the original elf file. 186 auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount())); 187 //This is the address of the elf "interpreter", It should be set 188 //to 0 for regular executables. It should be something else 189 //(not sure what) for dynamic libraries. 190 auxv.push_back(auxv_t(M5_AT_BASE, 0)); 191 192 //XXX Figure out what this should be. 193 auxv.push_back(auxv_t(M5_AT_FLAGS, 0)); 194 //The entry point to the program 195 auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint())); 196 //Different user and group IDs 197 auxv.push_back(auxv_t(M5_AT_UID, uid())); 198 auxv.push_back(auxv_t(M5_AT_EUID, euid())); 199 auxv.push_back(auxv_t(M5_AT_GID, gid())); 200 auxv.push_back(auxv_t(M5_AT_EGID, egid())); 201 //Whether to enable "secure mode" in the executable 202 auxv.push_back(auxv_t(M5_AT_SECURE, 0)); 203 204 // Pointer to 16 bytes of random data 205 auxv.push_back(auxv_t(M5_AT_RANDOM, 0)); 206 207 //The filename of the program 208 auxv.push_back(auxv_t(M5_AT_EXECFN, 0)); 209 //The string "v71" -- ARM v7 architecture 210 auxv.push_back(auxv_t(M5_AT_PLATFORM, 0)); 211 } 212 213 //Figure out how big the initial stack nedes to be 214 215 // A sentry NULL void pointer at the top of the stack. 216 int sentry_size = intSize; 217 218 string platform = "v71"; 219 int platform_size = platform.size() + 1; 220 221 // Bytes for AT_RANDOM above, we'll just keep them 0 222 int aux_random_size = 16; // as per the specification 223 224 // The aux vectors are put on the stack in two groups. The first group are 225 // the vectors that are generated as the elf is loaded. The second group 226 // are the ones that were computed ahead of time and include the platform 227 // string. 228 int aux_data_size = filename.size() + 1; 229 230 int env_data_size = 0; 231 for (int i = 0; i < envp.size(); ++i) { 232 env_data_size += envp[i].size() + 1; 233 } 234 int arg_data_size = 0; 235 for (int i = 0; i < argv.size(); ++i) { 236 arg_data_size += argv[i].size() + 1; 237 } 238 239 int info_block_size = 240 sentry_size + env_data_size + arg_data_size + 241 aux_data_size + platform_size + aux_random_size; 242 243 //Each auxilliary vector is two 4 byte words 244 int aux_array_size = intSize * 2 * (auxv.size() + 1); 245 246 int envp_array_size = intSize * (envp.size() + 1); 247 int argv_array_size = intSize * (argv.size() + 1); 248 249 int argc_size = intSize; 250 251 //Figure out the size of the contents of the actual initial frame 252 int frame_size = 253 info_block_size + 254 aux_array_size + 255 envp_array_size + 256 argv_array_size + 257 argc_size; 258 259 //There needs to be padding after the auxiliary vector data so that the 260 //very bottom of the stack is aligned properly. 261 int partial_size = frame_size; 262 int aligned_partial_size = roundUp(partial_size, align); 263 int aux_padding = aligned_partial_size - partial_size; 264 265 int space_needed = frame_size + aux_padding; 266 267 stack_min = stack_base - space_needed; 268 stack_min = roundDown(stack_min, align); 269 stack_size = stack_base - stack_min; 270 271 // map memory 272 pTable->allocate(roundDown(stack_min, pageSize), 273 roundUp(stack_size, pageSize)); 274 275 // map out initial stack contents 276 uint32_t sentry_base = stack_base - sentry_size; 277 uint32_t aux_data_base = sentry_base - aux_data_size; 278 uint32_t env_data_base = aux_data_base - env_data_size; 279 uint32_t arg_data_base = env_data_base - arg_data_size; 280 uint32_t platform_base = arg_data_base - platform_size; 281 uint32_t aux_random_base = platform_base - aux_random_size; 282 uint32_t auxv_array_base = aux_random_base - aux_array_size - aux_padding; 283 uint32_t envp_array_base = auxv_array_base - envp_array_size; 284 uint32_t argv_array_base = envp_array_base - argv_array_size; 285 uint32_t argc_base = argv_array_base - argc_size; 286 287 DPRINTF(Stack, "The addresses of items on the initial stack:\n"); 288 DPRINTF(Stack, "0x%x - aux data\n", aux_data_base); 289 DPRINTF(Stack, "0x%x - env data\n", env_data_base); 290 DPRINTF(Stack, "0x%x - arg data\n", arg_data_base); 291 DPRINTF(Stack, "0x%x - random data\n", aux_random_base); 292 DPRINTF(Stack, "0x%x - platform base\n", platform_base); 293 DPRINTF(Stack, "0x%x - auxv array\n", auxv_array_base); 294 DPRINTF(Stack, "0x%x - envp array\n", envp_array_base); 295 DPRINTF(Stack, "0x%x - argv array\n", argv_array_base); 296 DPRINTF(Stack, "0x%x - argc \n", argc_base); 297 DPRINTF(Stack, "0x%x - stack min\n", stack_min); 298 299 // write contents to stack 300 301 // figure out argc 302 uint32_t argc = argv.size(); 303 uint32_t guestArgc = ArmISA::htog(argc); 304 305 //Write out the sentry void * 306 uint32_t sentry_NULL = 0; 307 initVirtMem->writeBlob(sentry_base, 308 (uint8_t*)&sentry_NULL, sentry_size); 309 310 //Fix up the aux vectors which point to other data 311 for (int i = auxv.size() - 1; i >= 0; i--) { 312 if (auxv[i].a_type == M5_AT_PLATFORM) { 313 auxv[i].a_val = platform_base; 314 initVirtMem->writeString(platform_base, platform.c_str()); 315 } else if (auxv[i].a_type == M5_AT_EXECFN) { 316 auxv[i].a_val = aux_data_base; 317 initVirtMem->writeString(aux_data_base, filename.c_str()); 318 } else if (auxv[i].a_type == M5_AT_RANDOM) { 319 auxv[i].a_val = aux_random_base; 320 // Just leave the value 0, we don't want randomness 321 } 322 } 323 324 //Copy the aux stuff 325 for(int x = 0; x < auxv.size(); x++) 326 { 327 initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize, 328 (uint8_t*)&(auxv[x].a_type), intSize); 329 initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize, 330 (uint8_t*)&(auxv[x].a_val), intSize); 331 } 332 //Write out the terminating zeroed auxilliary vector 333 const uint64_t zero = 0; 334 initVirtMem->writeBlob(auxv_array_base + 2 * intSize * auxv.size(), 335 (uint8_t*)&zero, 2 * intSize); 336 337 copyStringArray(envp, envp_array_base, env_data_base, initVirtMem); 338 copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem); 339 340 initVirtMem->writeBlob(argc_base, (uint8_t*)&guestArgc, intSize); 341 342 ThreadContext *tc = system->getThreadContext(contextIds[0]); 343 //Set the stack pointer register 344 tc->setIntReg(StackPointerReg, stack_min); 345 //A pointer to a function to run when the program exits. We'll set this 346 //to zero explicitly to make sure this isn't used. 347 tc->setIntReg(ArgumentReg0, 0); 348 //Set argument regs 1 and 2 to argv[0] and envp[0] respectively 349 if (argv.size() > 0) { 350 tc->setIntReg(ArgumentReg1, arg_data_base + arg_data_size - 351 argv[argv.size() - 1].size() - 1); 352 } else { 353 tc->setIntReg(ArgumentReg1, 0); 354 } 355 if (envp.size() > 0) { 356 tc->setIntReg(ArgumentReg2, env_data_base + env_data_size - 357 envp[envp.size() - 1].size() - 1); 358 } else { 359 tc->setIntReg(ArgumentReg2, 0); 360 } 361 362 Addr prog_entry = objFile->entryPoint(); 363 if (arch == ObjectFile::Thumb) 364 prog_entry = (prog_entry & ~mask(1)) | (ULL(1) << PcTBitShift); 365 tc->setPC(prog_entry); 366 tc->setNextPC(prog_entry + sizeof(MachInst)); 367 368 //Align the "stack_min" to a page boundary. 369 stack_min = roundDown(stack_min, pageSize); 370} 371 372ArmISA::IntReg 373ArmLiveProcess::getSyscallArg(ThreadContext *tc, int &i) 374{ 375 assert(i < 6); 376 return tc->readIntReg(ArgumentReg0 + i++); 377} 378 379uint64_t 380ArmLiveProcess::getSyscallArg(ThreadContext *tc, int &i, int width) 381{ 382 assert(width == 32 || width == 64); 383 if (width == 32) 384 return getSyscallArg(tc, i); 385 386 // 64 bit arguments are passed starting in an even register 387 if (i % 2 != 0) 388 i++; 389 390 // Registers r0-r6 can be used 391 assert(i < 5); 392 uint64_t val; 393 val = tc->readIntReg(ArgumentReg0 + i++); 394 val |= ((uint64_t)tc->readIntReg(ArgumentReg0 + i++) << 32); 395 return val; 396} 397 398 399void 400ArmLiveProcess::setSyscallArg(ThreadContext *tc, 401 int i, ArmISA::IntReg val) 402{ 403 assert(i < 4); 404 tc->setIntReg(ArgumentReg0 + i, val); 405} 406 407void 408ArmLiveProcess::setSyscallReturn(ThreadContext *tc, 409 SyscallReturn return_value) 410{ 411 tc->setIntReg(ReturnValueReg, return_value.value()); 412} 413